683 	adev->gmc.vm_fault.num_types = 1;  in gmc_v9_0_set_irq_funcs()
684 	adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs;  in gmc_v9_0_set_irq_funcs()
687 	    !adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_set_irq_funcs()
688 		adev->gmc.ecc_irq.num_types = 1;  in gmc_v9_0_set_irq_funcs()
689 		adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs;  in gmc_v9_0_set_irq_funcs()
772 	if (adev->gmc.xgmi.num_physical_nodes &&  in gmc_v9_0_flush_gpu_tlb()
802 	spin_lock(&adev->gmc.invalidate_lock);  in gmc_v9_0_flush_gpu_tlb()
872 	spin_unlock(&adev->gmc.invalidate_lock);  in gmc_v9_0_flush_gpu_tlb()
913 		bool vega20_xgmi_wa = (adev->gmc.xgmi.num_physical_nodes &&  in gmc_v9_0_flush_gpu_tlb_pasid()
1097 	if (!adev->gmc.translate_further)  in gmc_v9_0_get_vm_pde()
1196 	adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs;  in gmc_v9_0_set_gmc_funcs()
1227 		if (!adev->gmc.xgmi.connected_to_cpu)  in gmc_v9_0_set_umc_funcs()
1315 		if (!adev->gmc.xgmi.connected_to_cpu)  in gmc_v9_0_set_mca_funcs()
1331 		adev->gmc.xgmi.supported = true;  in gmc_v9_0_early_init()
1334 		adev->gmc.xgmi.supported = true;  in gmc_v9_0_early_init()
1335 		adev->gmc.xgmi.connected_to_cpu =  in gmc_v9_0_early_init()
1348 	adev->gmc.shared_aperture_start = 0x2000000000000000ULL;  in gmc_v9_0_early_init()
1349 	adev->gmc.shared_aperture_end =  in gmc_v9_0_early_init()
1350 		adev->gmc.shared_aperture_start + (4ULL << 30) - 1;  in gmc_v9_0_early_init()
1351 	adev->gmc.private_aperture_start = 0x1000000000000000ULL;  in gmc_v9_0_early_init()
1352 	adev->gmc.private_aperture_end =  in gmc_v9_0_early_init()
1353 		adev->gmc.private_aperture_start + (4ULL << 30) - 1;  in gmc_v9_0_early_init()
1398 	return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);  in gmc_v9_0_late_init()
1407 	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;  in gmc_v9_0_vram_gtt_location()
1408 	if (adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_vram_gtt_location()
1420 		adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;  in gmc_v9_0_vram_gtt_location()
1437 	adev->gmc.mc_vram_size =  in gmc_v9_0_mc_init()
1439 	adev->gmc.real_vram_size = adev->gmc.mc_vram_size;  in gmc_v9_0_mc_init()
1442 	    !adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_mc_init()
1447 	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);  in gmc_v9_0_mc_init()
1448 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);  in gmc_v9_0_mc_init()
1464 	    (adev->gmc.xgmi.supported &&  in gmc_v9_0_mc_init()
1465 	     adev->gmc.xgmi.connected_to_cpu)) {  in gmc_v9_0_mc_init()
1466 		adev->gmc.aper_base =  in gmc_v9_0_mc_init()
1468 			adev->gmc.xgmi.physical_node_id *  in gmc_v9_0_mc_init()
1469 			adev->gmc.xgmi.node_segment_size;  in gmc_v9_0_mc_init()
1470 		adev->gmc.aper_size = adev->gmc.real_vram_size;  in gmc_v9_0_mc_init()
1475 	adev->gmc.visible_vram_size = adev->gmc.aper_size;  in gmc_v9_0_mc_init()
1476 	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)  in gmc_v9_0_mc_init()
1477 		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;  in gmc_v9_0_mc_init()
1488 			adev->gmc.gart_size = 512ULL << 20;  in gmc_v9_0_mc_init()
1493 			adev->gmc.gart_size = 1024ULL << 20;  in gmc_v9_0_mc_init()
1497 		adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;  in gmc_v9_0_mc_init()
1500 	adev->gmc.gart_size += adev->pm.smu_prv_buffer_size;  in gmc_v9_0_mc_init()
1502 	gmc_v9_0_vram_gtt_location(adev, &adev->gmc);  in gmc_v9_0_mc_init()
1516 	if (adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_gart_init()
1517 		adev->gmc.vmid0_page_table_depth = 1;  in gmc_v9_0_gart_init()
1518 		adev->gmc.vmid0_page_table_block_size = 12;  in gmc_v9_0_gart_init()
1520 		adev->gmc.vmid0_page_table_depth = 0;  in gmc_v9_0_gart_init()
1521 		adev->gmc.vmid0_page_table_block_size = 0;  in gmc_v9_0_gart_init()
1536 	if (adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_gart_init()
1555 		adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);  in gmc_v9_0_save_registers()
1569 	spin_lock_init(&adev->gmc.invalidate_lock);  in gmc_v9_0_sw_init()
1578 		adev->gmc.vram_width = 2048;  in gmc_v9_0_sw_init()
1580 		adev->gmc.vram_width = vram_width;  in gmc_v9_0_sw_init()
1582 	if (!adev->gmc.vram_width) {  in gmc_v9_0_sw_init()
1593 			adev->gmc.vram_width = numchan * chansize;  in gmc_v9_0_sw_init()
1597 	adev->gmc.vram_type = vram_type;  in gmc_v9_0_sw_init()
1598 	adev->gmc.vram_vendor = vram_vendor;  in gmc_v9_0_sw_init()
1609 			adev->gmc.translate_further =  in gmc_v9_0_sw_init()
1632 			adev->gmc.translate_further = adev->vm_manager.num_level > 1;  in gmc_v9_0_sw_init()
1639 		adev->gmc.translate_further = adev->vm_manager.num_level > 1;  in gmc_v9_0_sw_init()
1647 				&adev->gmc.vm_fault);  in gmc_v9_0_sw_init()
1653 					&adev->gmc.vm_fault);  in gmc_v9_0_sw_init()
1659 				&adev->gmc.vm_fault);  in gmc_v9_0_sw_init()
1665 	    !adev->gmc.xgmi.connected_to_cpu) {  in gmc_v9_0_sw_init()
1668 				      &adev->gmc.ecc_irq);  in gmc_v9_0_sw_init()
1677 	adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */  in gmc_v9_0_sw_init()
1731 	amdgpu_bo_free_kernel(&adev->gmc.pdb0_bo, NULL, &adev->gmc.ptr_pdb0);  in gmc_v9_0_sw_fini()
1776 		WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);  in gmc_v9_0_restore_registers()
1777 		WARN_ON(adev->gmc.sdpif_register !=  in gmc_v9_0_restore_registers()
1791 	if (adev->gmc.xgmi.connected_to_cpu)  in gmc_v9_0_gart_enable()
1809 		 (unsigned)(adev->gmc.gart_size >> 20));  in gmc_v9_0_gart_enable()
1810 	if (adev->gmc.pdb0_bo)  in gmc_v9_0_gart_enable()
1812 				(unsigned long long)amdgpu_bo_gpu_offset(adev->gmc.pdb0_bo));  in gmc_v9_0_gart_enable()
1901 	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);  in gmc_v9_0_hw_fini()
1902 	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);  in gmc_v9_0_hw_fini()