Lines Matching refs:RREG32
185 blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); in gmc_v8_0_mc_stop()
203 tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL); in gmc_v8_0_mc_resume()
252 if (RREG32(mmMC_SEQ_IO_DEBUG_DATA) == 0x05b4dc40) in gmc_v8_0_init_microcode()
319 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v8_0_tonga_mc_load_microcode()
342 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
348 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
388 data = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_polaris_mc_load_microcode()
412 data = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_polaris_mc_load_microcode()
427 base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF; in gmc_v8_0_vram_gtt_location()
462 tmp = RREG32(mmVGA_HDP_CONTROL); in gmc_v8_0_mc_program()
467 tmp = RREG32(mmVGA_RENDER_CONTROL); in gmc_v8_0_mc_program()
498 tmp = RREG32(mmHDP_MISC_CNTL); in gmc_v8_0_mc_program()
502 tmp = RREG32(mmHDP_HOST_PATH_CNTL); in gmc_v8_0_mc_program()
525 tmp = RREG32(mmMC_ARB_RAMCFG); in gmc_v8_0_mc_init()
531 tmp = RREG32(mmMC_SHARED_CHMAP); in gmc_v8_0_mc_init()
565 tmp = RREG32(mmCONFIG_MEMSIZE); in gmc_v8_0_mc_init()
585 adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22; in gmc_v8_0_mc_init()
644 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in gmc_v8_0_flush_gpu_tlb_pasid()
648 RREG32(mmVM_INVALIDATE_RESPONSE); in gmc_v8_0_flush_gpu_tlb_pasid()
751 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_set_fault_enable_default()
784 tmp = RREG32(mmVM_PRT_CNTL); in gmc_v8_0_set_prt()
851 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_enable()
859 tmp = RREG32(mmVM_L2_CNTL); in gmc_v8_0_gart_enable()
868 tmp = RREG32(mmVM_L2_CNTL2); in gmc_v8_0_gart_enable()
874 tmp = RREG32(mmVM_L2_CNTL3); in gmc_v8_0_gart_enable()
880 tmp = RREG32(mmVM_L2_CNTL4); in gmc_v8_0_gart_enable()
901 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_gart_enable()
931 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_gart_enable()
988 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_disable()
994 tmp = RREG32(mmVM_L2_CNTL); in gmc_v8_0_gart_disable()
1083 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v8_0_get_vbios_fb_size()
1089 u32 viewport = RREG32(mmVIEWPORT_SIZE); in gmc_v8_0_get_vbios_fb_size()
1114 tmp = RREG32(mmMC_SEQ_MISC0_FIJI); in gmc_v8_0_sw_init()
1116 tmp = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_sw_init()
1180 u64 tmp = RREG32(mmMC_VM_FB_OFFSET); in gmc_v8_0_sw_init()
1283 u32 tmp = RREG32(mmSRBM_STATUS); in gmc_v8_0_is_idle()
1300 tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK | in gmc_v8_0_wait_for_idle()
1318 u32 tmp = RREG32(mmSRBM_STATUS); in gmc_v8_0_check_soft_reset()
1366 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1370 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1376 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1413 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1417 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1423 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1427 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1451 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR); in gmc_v8_0_process_interrupt()
1452 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS); in gmc_v8_0_process_interrupt()
1453 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); in gmc_v8_0_process_interrupt()
1512 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_medium_grain_clock_gating()
1516 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_medium_grain_clock_gating()
1520 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1524 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_medium_grain_clock_gating()
1528 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_medium_grain_clock_gating()
1532 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1536 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_medium_grain_clock_gating()
1540 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1544 data = RREG32(mmVM_L2_CG); in fiji_update_mc_medium_grain_clock_gating()
1548 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_medium_grain_clock_gating()
1552 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_medium_grain_clock_gating()
1556 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1560 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_medium_grain_clock_gating()
1564 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_medium_grain_clock_gating()
1568 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1572 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_medium_grain_clock_gating()
1576 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1580 data = RREG32(mmVM_L2_CG); in fiji_update_mc_medium_grain_clock_gating()
1592 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_light_sleep()
1596 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_light_sleep()
1600 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_light_sleep()
1604 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_light_sleep()
1608 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_light_sleep()
1612 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1616 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_light_sleep()
1620 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_light_sleep()
1624 data = RREG32(mmVM_L2_CG); in fiji_update_mc_light_sleep()
1628 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_light_sleep()
1632 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_light_sleep()
1636 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_light_sleep()
1640 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_light_sleep()
1644 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_light_sleep()
1648 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1652 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_light_sleep()
1656 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_light_sleep()
1660 data = RREG32(mmVM_L2_CG); in fiji_update_mc_light_sleep()
1702 data = RREG32(mmMC_HUB_MISC_HUB_CG); in gmc_v8_0_get_clockgating_state()