159 	err = request_firmware(&adev->gmc.fw, fw_name, adev->dev);  in gmc_v7_0_init_microcode()
162 	err = amdgpu_ucode_validate(adev->gmc.fw);  in gmc_v7_0_init_microcode()
167 		release_firmware(adev->gmc.fw);  in gmc_v7_0_init_microcode()
168 		adev->gmc.fw = NULL;  in gmc_v7_0_init_microcode()
189 	if (!adev->gmc.fw)  in gmc_v7_0_mc_load_microcode()
192 	hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data;  in gmc_v7_0_mc_load_microcode()
195 	adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);  in gmc_v7_0_mc_load_microcode()
198 		(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));  in gmc_v7_0_mc_load_microcode()
201 		(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in gmc_v7_0_mc_load_microcode()
291 	       adev->gmc.vram_start >> 12);  in gmc_v7_0_mc_program()
293 	       adev->gmc.vram_end >> 12);  in gmc_v7_0_mc_program()
326 	adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev);  in gmc_v7_0_mc_init()
327 	if (!adev->gmc.vram_width) {  in gmc_v7_0_mc_init()
369 		adev->gmc.vram_width = numchan * chansize;  in gmc_v7_0_mc_init()
372 	adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
373 	adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
380 	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);  in gmc_v7_0_mc_init()
381 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);  in gmc_v7_0_mc_init()
385 	    adev->gmc.real_vram_size > adev->gmc.aper_size &&  in gmc_v7_0_mc_init()
387 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;  in gmc_v7_0_mc_init()
388 		adev->gmc.aper_size = adev->gmc.real_vram_size;  in gmc_v7_0_mc_init()
393 	adev->gmc.visible_vram_size = adev->gmc.aper_size;  in gmc_v7_0_mc_init()
394 	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)  in gmc_v7_0_mc_init()
395 		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;  in gmc_v7_0_mc_init()
402 			adev->gmc.gart_size = 256ULL << 20;  in gmc_v7_0_mc_init()
410 			adev->gmc.gart_size = 1024ULL << 20;  in gmc_v7_0_mc_init()
415 		adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;  in gmc_v7_0_mc_init()
418 	adev->gmc.gart_size += adev->pm.smu_prv_buffer_size;  in gmc_v7_0_mc_init()
419 	gmc_v7_0_vram_gtt_location(adev, &adev->gmc);  in gmc_v7_0_mc_init()
556 	if (enable && !adev->gmc.prt_warning) {  in gmc_v7_0_set_prt()
558 		adev->gmc.prt_warning = true;  in gmc_v7_0_set_prt()
656 	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);  in gmc_v7_0_gart_enable()
657 	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);  in gmc_v7_0_gart_enable()
711 		 (unsigned)(adev->gmc.gart_size >> 20),  in gmc_v7_0_gart_enable()
946 	adev->gmc.shared_aperture_start = 0x2000000000000000ULL;  in gmc_v7_0_early_init()
947 	adev->gmc.shared_aperture_end =  in gmc_v7_0_early_init()
948 		adev->gmc.shared_aperture_start + (4ULL << 30) - 1;  in gmc_v7_0_early_init()
949 	adev->gmc.private_aperture_start =  in gmc_v7_0_early_init()
950 		adev->gmc.shared_aperture_end + 1;  in gmc_v7_0_early_init()
951 	adev->gmc.private_aperture_end =  in gmc_v7_0_early_init()
952 		adev->gmc.private_aperture_start + (4ULL << 30) - 1;  in gmc_v7_0_early_init()
962 		return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);  in gmc_v7_0_late_init()
992 		adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;  in gmc_v7_0_sw_init()
996 		adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp);  in gmc_v7_0_sw_init()
999 …_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);  in gmc_v7_0_sw_init()
1003 …_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);  in gmc_v7_0_sw_init()
1017 	adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */  in gmc_v7_0_sw_init()
1066 	adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),  in gmc_v7_0_sw_init()
1068 	if (!adev->gmc.vm_fault_info)  in gmc_v7_0_sw_init()
1070 	atomic_set(&adev->gmc.vm_fault_info_updated, 0);  in gmc_v7_0_sw_init()
1081 	kfree(adev->gmc.vm_fault_info);  in gmc_v7_0_sw_fini()
1084 	release_firmware(adev->gmc.fw);  in gmc_v7_0_sw_fini()
1085 	adev->gmc.fw = NULL;  in gmc_v7_0_sw_fini()
1121 	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);  in gmc_v7_0_hw_fini()
1302 		&& !atomic_read(&adev->gmc.vm_fault_info_updated)) {  in gmc_v7_0_process_interrupt()
1303 		struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info;  in gmc_v7_0_process_interrupt()
1319 		atomic_set(&adev->gmc.vm_fault_info_updated, 1);  in gmc_v7_0_process_interrupt()
1386 	adev->gmc.gmc_funcs = &gmc_v7_0_gmc_funcs;  in gmc_v7_0_set_gmc_funcs()
1391 	adev->gmc.vm_fault.num_types = 1;  in gmc_v7_0_set_irq_funcs()
1392 	adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs;  in gmc_v7_0_set_irq_funcs()