Lines Matching refs:kiq
888 adev->gfx.kiq.pmf = &gfx_v9_0_kiq_pm4_funcs; in gfx_v9_0_set_kiq_pm4_funcs()
2106 struct amdgpu_kiq *kiq; in gfx_v9_0_sw_init() local
2223 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init()
2224 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v9_0_sw_init()
2254 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring); in gfx_v9_0_sw_fini()
3193 adev->gfx.kiq.ring.sched.ready = false; in gfx_v9_0_cp_compute_enable()
3475 (adev->doorbell_index.kiq * 2) << 2); in gfx_v9_0_kiq_init_register()
3646 ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_resume()
3825 soc15_grbm_select(adev, adev->gfx.kiq.ring.me, in gfx_v9_0_hw_fini()
3826 adev->gfx.kiq.ring.pipe, in gfx_v9_0_hw_fini()
3827 adev->gfx.kiq.ring.queue, 0); in gfx_v9_0_hw_fini()
3828 gfx_v9_0_kiq_fini_register(&adev->gfx.kiq.ring); in gfx_v9_0_hw_fini()
3949 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_kiq_read_clock() local
3950 struct amdgpu_ring *ring = &kiq->ring; in gfx_v9_0_kiq_read_clock()
3954 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
3976 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
4009 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
6790 adev->gfx.kiq.ring.funcs = &gfx_v9_0_ring_funcs_kiq; in gfx_v9_0_set_ring_funcs()