Lines Matching refs:mec

707 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);  in gfx_v11_0_mec_fini()
708 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v11_0_mec_fini()
709 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_data_obj, NULL, NULL); in gfx_v11_0_mec_fini()
733 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v11_0_mec_init()
742 &adev->gfx.mec.hpd_eop_obj, in gfx_v11_0_mec_init()
743 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v11_0_mec_init()
753 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v11_0_mec_init()
754 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v11_0_mec_init()
904 int mec, int pipe, int queue) in gfx_v11_0_compute_ring_init() argument
914 ring->me = mec + 1; in gfx_v11_0_compute_ring_init()
921 ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr in gfx_v11_0_compute_ring_init()
926 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v11_0_compute_ring_init()
1291 adev->gfx.mec.num_mec = 2; in gfx_v11_0_sw_init()
1292 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1293 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v11_0_sw_init()
1299 adev->gfx.mec.num_mec = 1; in gfx_v11_0_sw_init()
1300 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1301 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v11_0_sw_init()
1370 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v11_0_sw_init()
1371 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v11_0_sw_init()
1372 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_sw_init()
2333 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_config_mec_cache_rs64()
3321 &adev->gfx.mec.mec_fw_obj, in gfx_v11_0_cp_compute_load_microcode()
3322 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v11_0_cp_compute_load_microcode()
3332 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v11_0_cp_compute_load_microcode()
3333 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); in gfx_v11_0_cp_compute_load_microcode()
3335 gfx_v11_0_config_mec_cache(adev, adev->gfx.mec.mec_fw_gpu_addr); in gfx_v11_0_cp_compute_load_microcode()
3376 &adev->gfx.mec.mec_fw_obj, in gfx_v11_0_cp_compute_load_microcode_rs64()
3377 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v11_0_cp_compute_load_microcode_rs64()
3387 &adev->gfx.mec.mec_fw_data_obj, in gfx_v11_0_cp_compute_load_microcode_rs64()
3388 &adev->gfx.mec.mec_fw_data_gpu_addr, in gfx_v11_0_cp_compute_load_microcode_rs64()
3399 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v11_0_cp_compute_load_microcode_rs64()
3400 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_data_obj); in gfx_v11_0_cp_compute_load_microcode_rs64()
3401 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); in gfx_v11_0_cp_compute_load_microcode_rs64()
3402 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_data_obj); in gfx_v11_0_cp_compute_load_microcode_rs64()
3416 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_cp_compute_load_microcode_rs64()
3419 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
3421 upper_32_bits(adev->gfx.mec.mec_fw_data_gpu_addr)); in gfx_v11_0_cp_compute_load_microcode_rs64()
3429 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
3431 upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr)); in gfx_v11_0_cp_compute_load_microcode_rs64()
3993 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v11_0_kiq_init_queue()
3994 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); in gfx_v11_0_kiq_init_queue()
4014 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v11_0_kiq_init_queue()
4015 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); in gfx_v11_0_kiq_init_queue()
4035 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v11_0_kcq_init_queue()
4036 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); in gfx_v11_0_kcq_init_queue()
4039 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v11_0_kcq_init_queue()
4040 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); in gfx_v11_0_kcq_init_queue()
4486 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v11_0_soft_reset()
4487 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v11_0_soft_reset()
4488 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_soft_reset()