4269 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);  in gfx_v10_0_mec_fini()
4270 	amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);  in gfx_v10_0_mec_fini()
4299 	bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);  in gfx_v10_0_mec_init()
4308 					      &adev->gfx.mec.hpd_eop_obj,  in gfx_v10_0_mec_init()
4309 					      &adev->gfx.mec.hpd_eop_gpu_addr,  in gfx_v10_0_mec_init()
4319 		amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);  in gfx_v10_0_mec_init()
4320 		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);  in gfx_v10_0_mec_init()
4332 					      &adev->gfx.mec.mec_fw_obj,  in gfx_v10_0_mec_init()
4333 					      &adev->gfx.mec.mec_fw_gpu_addr,  in gfx_v10_0_mec_init()
4343 		amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj);  in gfx_v10_0_mec_init()
4344 		amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);  in gfx_v10_0_mec_init()
4553 				       int mec, int pipe, int queue)  in gfx_v10_0_compute_ring_init()  argument
4562 	ring->me = mec + 1;  in gfx_v10_0_compute_ring_init()
4569 	ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr  in gfx_v10_0_compute_ring_init()
4574 		+ ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)  in gfx_v10_0_compute_ring_init()
4598 		adev->gfx.mec.num_mec = 2;  in gfx_v10_0_sw_init()
4599 		adev->gfx.mec.num_pipe_per_mec = 4;  in gfx_v10_0_sw_init()
4600 		adev->gfx.mec.num_queue_per_pipe = 8;  in gfx_v10_0_sw_init()
4613 		adev->gfx.mec.num_mec = 2;  in gfx_v10_0_sw_init()
4614 		adev->gfx.mec.num_pipe_per_mec = 4;  in gfx_v10_0_sw_init()
4615 		adev->gfx.mec.num_queue_per_pipe = 4;  in gfx_v10_0_sw_init()
4621 		adev->gfx.mec.num_mec = 1;  in gfx_v10_0_sw_init()
4622 		adev->gfx.mec.num_pipe_per_mec = 4;  in gfx_v10_0_sw_init()
4623 		adev->gfx.mec.num_queue_per_pipe = 8;  in gfx_v10_0_sw_init()
4693 	for (i = 0; i < adev->gfx.mec.num_mec; ++i) {  in gfx_v10_0_sw_init()
4694 		for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {  in gfx_v10_0_sw_init()
4695 			for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {  in gfx_v10_0_sw_init()
6349 	WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr &  in gfx_v10_0_cp_compute_load_microcode()
6352 		     upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr));  in gfx_v10_0_cp_compute_load_microcode()
6900 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v10_0_kiq_init_queue()
6901 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));  in gfx_v10_0_kiq_init_queue()
6921 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v10_0_kiq_init_queue()
6922 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));  in gfx_v10_0_kiq_init_queue()
6942 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v10_0_kcq_init_queue()
6943 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));  in gfx_v10_0_kcq_init_queue()
6946 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v10_0_kcq_init_queue()
6947 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));  in gfx_v10_0_kcq_init_queue()