226 				  struct amdgpu_ib *ib,  in cik_sdma_ring_emit_ib()  argument
236 	amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */  in cik_sdma_ring_emit_ib()
237 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff);  in cik_sdma_ring_emit_ib()
238 	amdgpu_ring_write(ring, ib->length_dw);  in cik_sdma_ring_emit_ib()
664 	struct amdgpu_ib ib;  in cik_sdma_ring_test_ib()  local
678 	memset(&ib, 0, sizeof(ib));  in cik_sdma_ring_test_ib()
680 					AMDGPU_IB_POOL_DIRECT, &ib);  in cik_sdma_ring_test_ib()
684 	ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_ring_test_ib()
686 	ib.ptr[1] = lower_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
687 	ib.ptr[2] = upper_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
688 	ib.ptr[3] = 1;  in cik_sdma_ring_test_ib()
689 	ib.ptr[4] = 0xDEADBEEF;  in cik_sdma_ring_test_ib()
690 	ib.length_dw = 5;  in cik_sdma_ring_test_ib()
691 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in cik_sdma_ring_test_ib()
709 	amdgpu_ib_free(adev, &ib, NULL);  in cik_sdma_ring_test_ib()
726 static void cik_sdma_vm_copy_pte(struct amdgpu_ib *ib,  in cik_sdma_vm_copy_pte()  argument
732 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY,  in cik_sdma_vm_copy_pte()
734 	ib->ptr[ib->length_dw++] = bytes;  in cik_sdma_vm_copy_pte()
735 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_vm_copy_pte()
736 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in cik_sdma_vm_copy_pte()
737 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in cik_sdma_vm_copy_pte()
738 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_copy_pte()
739 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_copy_pte()
753 static void cik_sdma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_write_pte()  argument
759 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_vm_write_pte()
761 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_write_pte()
762 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_write_pte()
763 	ib->ptr[ib->length_dw++] = ndw;  in cik_sdma_vm_write_pte()
765 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in cik_sdma_vm_write_pte()
766 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in cik_sdma_vm_write_pte()
783 static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_set_pte_pde()  argument
788 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0);  in cik_sdma_vm_set_pte_pde()
789 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in cik_sdma_vm_set_pte_pde()
790 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_set_pte_pde()
791 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in cik_sdma_vm_set_pte_pde()
792 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in cik_sdma_vm_set_pte_pde()
793 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in cik_sdma_vm_set_pte_pde()
794 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in cik_sdma_vm_set_pte_pde()
795 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in cik_sdma_vm_set_pte_pde()
796 	ib->ptr[ib->length_dw++] = 0;  in cik_sdma_vm_set_pte_pde()
797 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in cik_sdma_vm_set_pte_pde()
807 static void cik_sdma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in cik_sdma_ring_pad_ib()  argument
813 	pad_count = (-ib->length_dw) & 7;  in cik_sdma_ring_pad_ib()
816 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
820 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
1311 static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_copy_buffer()  argument
1317 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);  in cik_sdma_emit_copy_buffer()
1318 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_copy_buffer()
1319 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_emit_copy_buffer()
1320 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1321 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1322 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1323 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1336 static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_fill_buffer()  argument
1341 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0);  in cik_sdma_emit_fill_buffer()
1342 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1343 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1344 	ib->ptr[ib->length_dw++] = src_data;  in cik_sdma_emit_fill_buffer()
1345 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_fill_buffer()