270 	if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv)  in amdgpu_vm_bo_base_init()
273 	dma_resv_assert_held(vm->root.bo->tbo.base.resv);  in amdgpu_vm_bo_base_init()
772 			   struct dma_resv *resv, uint64_t start, uint64_t last,  in amdgpu_vm_update_range()  argument
832 	r = vm->update_funcs->prepare(&params, resv, sync_mode);  in amdgpu_vm_update_range()
978 	struct dma_resv *resv;  in amdgpu_vm_bo_update()  local
985 		resv = vm->root.bo->tbo.base.resv;  in amdgpu_vm_bo_update()
989 		resv = bo->tbo.base.resv;  in amdgpu_vm_bo_update()
1019 	if (clear || (bo && bo->tbo.base.resv ==  in amdgpu_vm_bo_update()
1020 		      vm->root.bo->tbo.base.resv))  in amdgpu_vm_bo_update()
1050 					   resv, mapping->start, mapping->last,  in amdgpu_vm_bo_update()
1062 	if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) {  in amdgpu_vm_bo_update()
1200 	struct dma_resv *resv = vm->root.bo->tbo.base.resv;  in amdgpu_vm_prt_fini()  local
1204 	dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, fence) {  in amdgpu_vm_prt_fini()
1230 	struct dma_resv *resv = vm->root.bo->tbo.base.resv;  in amdgpu_vm_clear_freed()  local
1245 		r = amdgpu_vm_update_range(adev, vm, false, false, true, resv,  in amdgpu_vm_clear_freed()
1284 	struct dma_resv *resv;  in amdgpu_vm_handle_moved()  local
1304 		resv = bo_va->base.bo->tbo.base.resv;  in amdgpu_vm_handle_moved()
1308 		if (!amdgpu_vm_debug && dma_resv_trylock(resv))  in amdgpu_vm_handle_moved()
1319 			dma_resv_unlock(resv);  in amdgpu_vm_handle_moved()
1361 	dma_resv_assert_held(bo->tbo.base.resv);  in amdgpu_vm_bo_add()
1395 	if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&  in amdgpu_vm_bo_insert_map()
1729 			if (dma_resv_locking_ctx(bo->tbo.base.resv) !=  in amdgpu_vm_bo_trace_cs()
1756 	dma_resv_assert_held(vm->root.bo->tbo.base.resv);  in amdgpu_vm_bo_del()
1759 		dma_resv_assert_held(bo->tbo.base.resv);  in amdgpu_vm_bo_del()
1760 		if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv)  in amdgpu_vm_bo_del()
1815 	if (!dma_resv_test_signaled(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP))  in amdgpu_vm_evictable()
1854 		if (evicted && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) {  in amdgpu_vm_bo_invalidate()
1865 		else if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv)  in amdgpu_vm_bo_invalidate()
1995 	timeout = dma_resv_wait_timeout(vm->root.bo->tbo.base.resv,  in amdgpu_vm_wait_idle()
2080 	r = dma_resv_reserve_fences(root_bo->tbo.base.resv, 1);  in amdgpu_vm_init()
2515 	r = dma_resv_reserve_fences(root->tbo.base.resv, 1);  in amdgpu_vm_handle_fault()