Lines Matching refs:vcn
92 INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler); in amdgpu_vcn_sw_init()
93 mutex_init(&adev->vcn.vcn_pg_lock); in amdgpu_vcn_sw_init()
94 mutex_init(&adev->vcn.vcn1_jpeg1_workaround); in amdgpu_vcn_sw_init()
95 atomic_set(&adev->vcn.total_submission_cnt, 0); in amdgpu_vcn_sw_init()
96 for (i = 0; i < adev->vcn.num_vcn_inst; i++) in amdgpu_vcn_sw_init()
97 atomic_set(&adev->vcn.inst[i].dpg_enc_submission_cnt, 0); in amdgpu_vcn_sw_init()
113 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
123 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
129 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
135 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
144 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
155 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
161 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
167 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
173 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
179 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
185 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
191 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
197 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
203 adev->vcn.indirect_sram = true; in amdgpu_vcn_sw_init()
209 r = request_firmware(&adev->vcn.fw, fw_name, adev->dev); in amdgpu_vcn_sw_init()
216 r = amdgpu_ucode_validate(adev->vcn.fw); in amdgpu_vcn_sw_init()
220 release_firmware(adev->vcn.fw); in amdgpu_vcn_sw_init()
221 adev->vcn.fw = NULL; in amdgpu_vcn_sw_init()
225 hdr = (const struct common_firmware_header *)adev->vcn.fw->data; in amdgpu_vcn_sw_init()
226 adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); in amdgpu_vcn_sw_init()
272 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_vcn_sw_init()
273 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_sw_init()
277 AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].vcpu_bo, in amdgpu_vcn_sw_init()
278 &adev->vcn.inst[i].gpu_addr, &adev->vcn.inst[i].cpu_addr); in amdgpu_vcn_sw_init()
284 adev->vcn.inst[i].fw_shared.cpu_addr = adev->vcn.inst[i].cpu_addr + in amdgpu_vcn_sw_init()
286 adev->vcn.inst[i].fw_shared.gpu_addr = adev->vcn.inst[i].gpu_addr + in amdgpu_vcn_sw_init()
289 adev->vcn.inst[i].fw_shared.mem_size = fw_shared_size; in amdgpu_vcn_sw_init()
292 adev->vcn.inst[i].fw_shared.cpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
293 adev->vcn.inst[i].fw_shared.gpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
294 adev->vcn.inst[i].fw_shared.log_offset = log_offset; in amdgpu_vcn_sw_init()
297 if (adev->vcn.indirect_sram) { in amdgpu_vcn_sw_init()
299 AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].dpg_sram_bo, in amdgpu_vcn_sw_init()
300 &adev->vcn.inst[i].dpg_sram_gpu_addr, &adev->vcn.inst[i].dpg_sram_cpu_addr); in amdgpu_vcn_sw_init()
315 for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { in amdgpu_vcn_sw_fini()
316 if (adev->vcn.harvest_config & (1 << j)) in amdgpu_vcn_sw_fini()
319 if (adev->vcn.indirect_sram) { in amdgpu_vcn_sw_fini()
320 amdgpu_bo_free_kernel(&adev->vcn.inst[j].dpg_sram_bo, in amdgpu_vcn_sw_fini()
321 &adev->vcn.inst[j].dpg_sram_gpu_addr, in amdgpu_vcn_sw_fini()
322 (void **)&adev->vcn.inst[j].dpg_sram_cpu_addr); in amdgpu_vcn_sw_fini()
324 kvfree(adev->vcn.inst[j].saved_bo); in amdgpu_vcn_sw_fini()
326 amdgpu_bo_free_kernel(&adev->vcn.inst[j].vcpu_bo, in amdgpu_vcn_sw_fini()
327 &adev->vcn.inst[j].gpu_addr, in amdgpu_vcn_sw_fini()
328 (void **)&adev->vcn.inst[j].cpu_addr); in amdgpu_vcn_sw_fini()
330 amdgpu_ring_fini(&adev->vcn.inst[j].ring_dec); in amdgpu_vcn_sw_fini()
332 for (i = 0; i < adev->vcn.num_enc_rings; ++i) in amdgpu_vcn_sw_fini()
333 amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_sw_fini()
336 release_firmware(adev->vcn.fw); in amdgpu_vcn_sw_fini()
337 mutex_destroy(&adev->vcn.vcn1_jpeg1_workaround); in amdgpu_vcn_sw_fini()
338 mutex_destroy(&adev->vcn.vcn_pg_lock); in amdgpu_vcn_sw_fini()
358 int vcn_config = adev->vcn.vcn_config[vcn_instance]; in amdgpu_vcn_is_disabled_vcn()
377 cancel_delayed_work_sync(&adev->vcn.idle_work); in amdgpu_vcn_suspend()
379 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_vcn_suspend()
380 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_suspend()
382 if (adev->vcn.inst[i].vcpu_bo == NULL) in amdgpu_vcn_suspend()
385 size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); in amdgpu_vcn_suspend()
386 ptr = adev->vcn.inst[i].cpu_addr; in amdgpu_vcn_suspend()
388 adev->vcn.inst[i].saved_bo = kvmalloc(size, GFP_KERNEL); in amdgpu_vcn_suspend()
389 if (!adev->vcn.inst[i].saved_bo) in amdgpu_vcn_suspend()
393 memcpy_fromio(adev->vcn.inst[i].saved_bo, ptr, size); in amdgpu_vcn_suspend()
406 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_vcn_resume()
407 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_resume()
409 if (adev->vcn.inst[i].vcpu_bo == NULL) in amdgpu_vcn_resume()
412 size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); in amdgpu_vcn_resume()
413 ptr = adev->vcn.inst[i].cpu_addr; in amdgpu_vcn_resume()
415 if (adev->vcn.inst[i].saved_bo != NULL) { in amdgpu_vcn_resume()
417 memcpy_toio(ptr, adev->vcn.inst[i].saved_bo, size); in amdgpu_vcn_resume()
420 kvfree(adev->vcn.inst[i].saved_bo); in amdgpu_vcn_resume()
421 adev->vcn.inst[i].saved_bo = NULL; in amdgpu_vcn_resume()
426 hdr = (const struct common_firmware_header *)adev->vcn.fw->data; in amdgpu_vcn_resume()
430 memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset, in amdgpu_vcn_resume()
446 container_of(work, struct amdgpu_device, vcn.idle_work.work); in amdgpu_vcn_idle_work_handler()
451 for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { in amdgpu_vcn_idle_work_handler()
452 if (adev->vcn.harvest_config & (1 << j)) in amdgpu_vcn_idle_work_handler()
455 for (i = 0; i < adev->vcn.num_enc_rings; ++i) { in amdgpu_vcn_idle_work_handler()
456 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_idle_work_handler()
463 unlikely(atomic_read(&adev->vcn.inst[j].dpg_enc_submission_cnt))) in amdgpu_vcn_idle_work_handler()
468 adev->vcn.pause_dpg_mode(adev, j, &new_state); in amdgpu_vcn_idle_work_handler()
471 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec); in amdgpu_vcn_idle_work_handler()
475 if (!fences && !atomic_read(&adev->vcn.total_submission_cnt)) { in amdgpu_vcn_idle_work_handler()
483 schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT); in amdgpu_vcn_idle_work_handler()
492 atomic_inc(&adev->vcn.total_submission_cnt); in amdgpu_vcn_ring_begin_use()
494 if (!cancel_delayed_work_sync(&adev->vcn.idle_work)) { in amdgpu_vcn_ring_begin_use()
501 mutex_lock(&adev->vcn.vcn_pg_lock); in amdgpu_vcn_ring_begin_use()
509 atomic_inc(&adev->vcn.inst[ring->me].dpg_enc_submission_cnt); in amdgpu_vcn_ring_begin_use()
515 for (i = 0; i < adev->vcn.num_enc_rings; ++i) in amdgpu_vcn_ring_begin_use()
516 fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); in amdgpu_vcn_ring_begin_use()
518 if (fences || atomic_read(&adev->vcn.inst[ring->me].dpg_enc_submission_cnt)) in amdgpu_vcn_ring_begin_use()
524 adev->vcn.pause_dpg_mode(adev, ring->me, &new_state); in amdgpu_vcn_ring_begin_use()
526 mutex_unlock(&adev->vcn.vcn_pg_lock); in amdgpu_vcn_ring_begin_use()
533 atomic_dec(&ring->adev->vcn.inst[ring->me].dpg_enc_submission_cnt); in amdgpu_vcn_ring_end_use()
535 atomic_dec(&ring->adev->vcn.total_submission_cnt); in amdgpu_vcn_ring_end_use()
537 schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT); in amdgpu_vcn_ring_end_use()
551 WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); in amdgpu_vcn_dec_ring_test_ring()
555 amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0)); in amdgpu_vcn_dec_ring_test_ring()
559 tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9); in amdgpu_vcn_dec_ring_test_ring()
619 ib->ptr[0] = PACKET0(adev->vcn.internal.data0, 0); in amdgpu_vcn_dec_send_msg()
621 ib->ptr[2] = PACKET0(adev->vcn.internal.data1, 0); in amdgpu_vcn_dec_send_msg()
623 ib->ptr[4] = PACKET0(adev->vcn.internal.cmd, 0); in amdgpu_vcn_dec_send_msg()
626 ib->ptr[i] = PACKET0(adev->vcn.internal.nop, 0); in amdgpu_vcn_dec_send_msg()
1108 hdr = (const struct common_firmware_header *)adev->vcn.fw->data; in amdgpu_vcn_setup_ucode()
1110 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_vcn_setup_ucode()
1111 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_setup_ucode()
1120 adev->firmware.ucode[idx].fw = adev->vcn.fw; in amdgpu_vcn_setup_ucode()
1135 struct amdgpu_vcn_inst *vcn; in amdgpu_debugfs_vcn_fwlog_read() local
1141 vcn = file_inode(f)->i_private; in amdgpu_debugfs_vcn_fwlog_read()
1142 if (!vcn) in amdgpu_debugfs_vcn_fwlog_read()
1145 if (!vcn->fw_shared.cpu_addr || !amdgpu_vcnfw_log) in amdgpu_debugfs_vcn_fwlog_read()
1148 log_buf = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_debugfs_vcn_fwlog_read()
1200 struct amdgpu_vcn_inst *vcn) in amdgpu_debugfs_vcn_fwlog_init() argument
1208 debugfs_create_file_size(name, S_IFREG | S_IRUGO, root, vcn, in amdgpu_debugfs_vcn_fwlog_init()
1214 void amdgpu_vcn_fwlog_init(struct amdgpu_vcn_inst *vcn) in amdgpu_vcn_fwlog_init() argument
1217 volatile uint32_t *flag = vcn->fw_shared.cpu_addr; in amdgpu_vcn_fwlog_init()
1218 void *fw_log_cpu_addr = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
1219 uint64_t fw_log_gpu_addr = vcn->fw_shared.gpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
1221 volatile struct amdgpu_fw_shared_fw_logging *fw_log = vcn->fw_shared.cpu_addr in amdgpu_vcn_fwlog_init()
1222 + vcn->fw_shared.log_offset; in amdgpu_vcn_fwlog_init()
1241 struct ras_common_if *ras_if = adev->vcn.ras_if; in amdgpu_vcn_process_poison_irq()