38 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_umc_do_page_retirement()
39 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_count)  in amdgpu_umc_do_page_retirement()
40 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
42 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_umc_do_page_retirement()
43 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_address &&  in amdgpu_umc_do_page_retirement()
44 		    adev->umc.max_ras_err_cnt_per_query) {  in amdgpu_umc_do_page_retirement()
46 				kcalloc(adev->umc.max_ras_err_cnt_per_query,  in amdgpu_umc_do_page_retirement()
59 			adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
62 		if (adev->umc.ras &&  in amdgpu_umc_do_page_retirement()
63 		    adev->umc.ras->ecc_info_query_ras_error_count)  in amdgpu_umc_do_page_retirement()
64 		    adev->umc.ras->ecc_info_query_ras_error_count(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
66 		if (adev->umc.ras &&  in amdgpu_umc_do_page_retirement()
67 		    adev->umc.ras->ecc_info_query_ras_error_address &&  in amdgpu_umc_do_page_retirement()
68 		    adev->umc.max_ras_err_cnt_per_query) {  in amdgpu_umc_do_page_retirement()
70 				kcalloc(adev->umc.max_ras_err_cnt_per_query,  in amdgpu_umc_do_page_retirement()
83 			adev->umc.ras->ecc_info_query_ras_error_address(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
159 	if (adev->umc.ras &&  in amdgpu_umc_ras_late_init()
160 	    adev->umc.ras->err_cnt_init)  in amdgpu_umc_ras_late_init()
161 		adev->umc.ras->err_cnt_init(adev);  in amdgpu_umc_ras_late_init()
174 	struct ras_common_if *ras_if = adev->umc.ras_if;  in amdgpu_umc_process_ecc_irq()