86 	/* Direct submission to the ring buffer during init and reset. */
111 	/* sync_seq is protected by ring emission lock */
125 void amdgpu_fence_driver_clear_job_fences(struct amdgpu_ring *ring);
126 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
128 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
129 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
136 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, struct amdgpu_job *job,
138 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
140 bool amdgpu_fence_process(struct amdgpu_ring *ring);
141 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
142 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
145 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
152 /* provided by hw blocks that expose a ring buffer for commands */
163 	/* ring read/write ptr handling */
164 	u64 (*get_rptr)(struct amdgpu_ring *ring);
165 	u64 (*get_wptr)(struct amdgpu_ring *ring);
166 	void (*set_wptr)(struct amdgpu_ring *ring);
178 	void (*emit_ib)(struct amdgpu_ring *ring,
182 	void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
184 	void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
185 	void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vmid,
187 	void (*emit_hdp_flush)(struct amdgpu_ring *ring);
188 	void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
193 	int (*test_ring)(struct amdgpu_ring *ring);
194 	int (*test_ib)(struct amdgpu_ring *ring, long timeout);
196 	void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
197 	void (*insert_start)(struct amdgpu_ring *ring);
198 	void (*insert_end)(struct amdgpu_ring *ring);
200 	void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
201 	unsigned (*init_cond_exec)(struct amdgpu_ring *ring);
202 	void (*patch_cond_exec)(struct amdgpu_ring *ring, unsigned offset);
204 	void (*begin_use)(struct amdgpu_ring *ring);
205 	void (*end_use)(struct amdgpu_ring *ring);
206 	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
207 	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
208 	void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg,
210 	void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
211 	void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg,
213 	void (*emit_reg_write_reg_wait)(struct amdgpu_ring *ring,
216 	void (*emit_frame_cntl)(struct amdgpu_ring *ring, bool start,
218 	/* Try to soft recover the ring to make the fence signal */
219 	void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid);
220 	int (*preempt_ib)(struct amdgpu_ring *ring);
221 	void (*emit_mem_sync)(struct amdgpu_ring *ring);
222 	void (*emit_wave_limit)(struct amdgpu_ring *ring, bool enable);
232 	volatile uint32_t	*ring;  member
309 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
310 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
311 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
312 void amdgpu_ring_commit(struct amdgpu_ring *ring);
313 void amdgpu_ring_undo(struct amdgpu_ring *ring);
314 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
318 void amdgpu_ring_fini(struct amdgpu_ring *ring);
319 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,
322 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
325 static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring,  in amdgpu_ring_set_preempt_cond_exec()  argument
328 	*ring->cond_exe_cpu_addr = cond_exec;  in amdgpu_ring_set_preempt_cond_exec()
331 static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)  in amdgpu_ring_clear_ring()  argument
334 	while (i <= ring->buf_mask)  in amdgpu_ring_clear_ring()
335 		ring->ring[i++] = ring->funcs->nop;  in amdgpu_ring_clear_ring()
339 static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)  in amdgpu_ring_write()  argument
341 	if (ring->count_dw <= 0)  in amdgpu_ring_write()
342 		DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");  in amdgpu_ring_write()
343 	ring->ring[ring->wptr++ & ring->buf_mask] = v;  in amdgpu_ring_write()
344 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write()
345 	ring->count_dw--;  in amdgpu_ring_write()
348 static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,  in amdgpu_ring_write_multiple()  argument
354 	if (unlikely(ring->count_dw < count_dw))  in amdgpu_ring_write_multiple()
355 		DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");  in amdgpu_ring_write_multiple()
357 	occupied = ring->wptr & ring->buf_mask;  in amdgpu_ring_write_multiple()
358 	dst = (void *)&ring->ring[occupied];  in amdgpu_ring_write_multiple()
359 	chunk1 = ring->buf_mask + 1 - occupied;  in amdgpu_ring_write_multiple()
370 		dst = (void *)ring->ring;  in amdgpu_ring_write_multiple()
374 	ring->wptr += count_dw;  in amdgpu_ring_write_multiple()
375 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write_multiple()
376 	ring->count_dw -= count_dw;  in amdgpu_ring_write_multiple()
379 #define amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset)			\  argument
380 	(ring->is_mes_queue && ring->mes_ctx ?				\
381 	 (ring->mes_ctx->meta_data_gpu_addr + offset) : 0)
383 #define amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset)			\  argument
384 	(ring->is_mes_queue && ring->mes_ctx ?				\
385 	 (void *)((uint8_t *)(ring->mes_ctx->meta_data_ptr) + offset) : \
388 int amdgpu_ring_test_helper(struct amdgpu_ring *ring);
391 			      struct amdgpu_ring *ring);
393 int amdgpu_ring_init_mqd(struct amdgpu_ring *ring);
412 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,