Lines Matching refs:dev_info

154 		dev_info(adev->dev, "Using ATPX for runtime pm\n");  in amdgpu_driver_load_kms()
158 dev_info(adev->dev, "Using BOCO for runtime pm\n"); in amdgpu_driver_load_kms()
180 dev_info(adev->dev, "Using BACO for runtime pm\n"); in amdgpu_driver_load_kms()
767 struct drm_amdgpu_info_device *dev_info; in amdgpu_info_ioctl() local
771 dev_info = kzalloc(sizeof(*dev_info), GFP_KERNEL); in amdgpu_info_ioctl()
772 if (!dev_info) in amdgpu_info_ioctl()
775 dev_info->device_id = adev->pdev->device; in amdgpu_info_ioctl()
776 dev_info->chip_rev = adev->rev_id; in amdgpu_info_ioctl()
777 dev_info->external_rev = adev->external_rev_id; in amdgpu_info_ioctl()
778 dev_info->pci_rev = adev->pdev->revision; in amdgpu_info_ioctl()
779 dev_info->family = adev->family; in amdgpu_info_ioctl()
780 dev_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
781 dev_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
783 dev_info->gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10; in amdgpu_info_ioctl()
785 dev_info->max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10; in amdgpu_info_ioctl()
786 dev_info->max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10; in amdgpu_info_ioctl()
788 dev_info->max_engine_clock = adev->clock.default_sclk * 10; in amdgpu_info_ioctl()
789 dev_info->max_memory_clock = adev->clock.default_mclk * 10; in amdgpu_info_ioctl()
791 dev_info->enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask; in amdgpu_info_ioctl()
792 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
794 dev_info->num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts; in amdgpu_info_ioctl()
795 dev_info->_pad = 0; in amdgpu_info_ioctl()
796 dev_info->ids_flags = 0; in amdgpu_info_ioctl()
798 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION; in amdgpu_info_ioctl()
800 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; in amdgpu_info_ioctl()
802 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ; in amdgpu_info_ioctl()
812 dev_info->virtual_address_offset = AMDGPU_VA_RESERVED_SIZE; in amdgpu_info_ioctl()
813 dev_info->virtual_address_max = in amdgpu_info_ioctl()
817 dev_info->high_va_offset = AMDGPU_GMC_HOLE_END; in amdgpu_info_ioctl()
818 dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size; in amdgpu_info_ioctl()
820 dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
821 dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
822 dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
823 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
824 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
825 dev_info->ce_ram_size = adev->gfx.ce_ram_size; in amdgpu_info_ioctl()
826 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
828 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
830 dev_info->vram_type = adev->gmc.vram_type; in amdgpu_info_ioctl()
831 dev_info->vram_bit_width = adev->gmc.vram_width; in amdgpu_info_ioctl()
832 dev_info->vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
833 dev_info->gc_double_offchip_lds_buf = in amdgpu_info_ioctl()
835 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
836 dev_info->num_shader_visible_vgprs = adev->gfx.config.max_gprs; in amdgpu_info_ioctl()
837 dev_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_info_ioctl()
838 dev_info->num_tcc_blocks = adev->gfx.config.max_texture_channel_caches; in amdgpu_info_ioctl()
839 dev_info->gs_vgt_table_depth = adev->gfx.config.gs_vgt_table_depth; in amdgpu_info_ioctl()
840 dev_info->gs_prim_buffer_depth = adev->gfx.config.gs_prim_buffer_depth; in amdgpu_info_ioctl()
841 dev_info->max_gs_waves_per_vgt = adev->gfx.config.max_gs_threads; in amdgpu_info_ioctl()
844 dev_info->pa_sc_tile_steering_override = in amdgpu_info_ioctl()
847 dev_info->tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; in amdgpu_info_ioctl()
849 ret = copy_to_user(out, dev_info, in amdgpu_info_ioctl()
850 min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0; in amdgpu_info_ioctl()
851 kfree(dev_info); in amdgpu_info_ioctl()