51 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_pdb0_alloc()
52 	uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21;  in amdgpu_gmc_pdb0_alloc()
65 	r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
69 	r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false);  in amdgpu_gmc_pdb0_alloc()
73 	r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM);  in amdgpu_gmc_pdb0_alloc()
76 	r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0);  in amdgpu_gmc_pdb0_alloc()
80 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
84 	amdgpu_bo_unpin(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
86 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
88 	amdgpu_bo_unref(&adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
185 	if (bo->ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)  in amdgpu_gmc_agp_addr()
188 	return adev->gmc.agp_start + bo->ttm->dma_address[0];  in amdgpu_gmc_agp_addr()
268 	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1);  in amdgpu_gmc_gart_location()
369 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults()  local
381 	if (gmc->fault_ring[gmc->last_fault].timestamp >= stamp)  in amdgpu_gmc_filter_faults()
386 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults()
394 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults()
402 	fault = &gmc->fault_ring[gmc->last_fault];  in amdgpu_gmc_filter_faults()
407 	fault->next = gmc->fault_hash[hash].idx;  in amdgpu_gmc_filter_faults()
408 	gmc->fault_hash[hash].idx = gmc->last_fault++;  in amdgpu_gmc_filter_faults()
425 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults_remove()  local
432 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults_remove()
438 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults_remove()
444 	if (!adev->gmc.xgmi.connected_to_cpu) {  in amdgpu_gmc_ras_early_init()
445 		adev->gmc.xgmi.ras = &xgmi_ras;  in amdgpu_gmc_ras_early_init()
446 		amdgpu_ras_register_ras_block(adev, &adev->gmc.xgmi.ras->ras_block);  in amdgpu_gmc_ras_early_init()
447 		adev->gmc.xgmi.ras_if = &adev->gmc.xgmi.ras->ras_block.ras_comm;  in amdgpu_gmc_ras_early_init()
530 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
534 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
554 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
558 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
564 		adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
580 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_noretry_set()  local
589 	gmc->noretry = (amdgpu_noretry == -1) ? noretry_default : amdgpu_noretry;  in amdgpu_gmc_noretry_set()
675 	if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))  in amdgpu_gmc_get_vbios_allocations()
709 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_init_pdb0()
710 	u64 pde0_page_size = (1ULL<<adev->gmc.vmid0_page_table_block_size)<<21;  in amdgpu_gmc_init_pdb0()
712 		adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;  in amdgpu_gmc_init_pdb0()
723 	flags |= AMDGPU_PTE_FRAG((adev->gmc.vmid0_page_table_block_size + 9*1));  in amdgpu_gmc_init_pdb0()
730 		amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, vram_addr, flags);  in amdgpu_gmc_init_pdb0()
739 	amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, gart_ptb_gpu_pa, flags);  in amdgpu_gmc_init_pdb0()
752 	return mc_addr - adev->gmc.vram_start + adev->vm_manager.vram_base_offset;  in amdgpu_gmc_vram_mc2pa()
776 	return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;  in amdgpu_gmc_vram_cpu_pa()