21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
46  * amdgpu_debugfs_process_reg_op - Handle MMIO register reads/writes
48  * @read: True if reading
50  * @buf: User buffer to write/read to
51  * @size: Number of bytes to write/read
65  * 	    This is necessary to read registers that might be
68  * The lower bits are the BYTE offset of the register to read.  This
72 static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,  in amdgpu_debugfs_process_reg_op()  argument
75 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_process_reg_op()
86 		return -EINVAL;  in amdgpu_debugfs_process_reg_op()
115 	*pos &= (1UL << 22) - 1;  in amdgpu_debugfs_process_reg_op()
117 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
119 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
125 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
130 		if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) ||  in amdgpu_debugfs_process_reg_op()
131 		    (se_bank != 0xFFFFFFFF && se_bank >= adev->gfx.config.max_shader_engines)) {  in amdgpu_debugfs_process_reg_op()
132 			pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
133 			pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
135 			return -EINVAL;  in amdgpu_debugfs_process_reg_op()
137 		mutex_lock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_process_reg_op()
141 		mutex_lock(&adev->srbm_mutex);  in amdgpu_debugfs_process_reg_op()
146 		mutex_lock(&adev->pm.mutex);  in amdgpu_debugfs_process_reg_op()
151 		if (read) {  in amdgpu_debugfs_process_reg_op()
167 		size -= 4;  in amdgpu_debugfs_process_reg_op()
173 		mutex_unlock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_process_reg_op()
176 		mutex_unlock(&adev->srbm_mutex);  in amdgpu_debugfs_process_reg_op()
180 		mutex_unlock(&adev->pm.mutex);  in amdgpu_debugfs_process_reg_op()
182 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
183 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_process_reg_op()
190  * amdgpu_debugfs_regs_read - Callback for reading MMIO registers
199  * amdgpu_debugfs_regs_write - Callback for writing MMIO registers
213 		return -ENOMEM;  in amdgpu_debugfs_regs2_open()
214 	rd->adev = file_inode(file)->i_private;  in amdgpu_debugfs_regs2_open()
215 	file->private_data = rd;  in amdgpu_debugfs_regs2_open()
216 	mutex_init(&rd->lock);  in amdgpu_debugfs_regs2_open()
223 	struct amdgpu_debugfs_regs2_data *rd = file->private_data;  in amdgpu_debugfs_regs2_release()
224 	mutex_destroy(&rd->lock);  in amdgpu_debugfs_regs2_release()
225 	kfree(file->private_data);  in amdgpu_debugfs_regs2_release()
231 	struct amdgpu_debugfs_regs2_data *rd = f->private_data;  in amdgpu_debugfs_regs2_op()
232 	struct amdgpu_device *adev = rd->adev;  in amdgpu_debugfs_regs2_op()
238 		return -EINVAL;  in amdgpu_debugfs_regs2_op()
240 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
242 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
248 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
252 	mutex_lock(&rd->lock);  in amdgpu_debugfs_regs2_op()
254 	if (rd->id.use_grbm) {  in amdgpu_debugfs_regs2_op()
255 		if ((rd->id.grbm.sh != 0xFFFFFFFF && rd->id.grbm.sh >= adev->gfx.config.max_sh_per_se) ||  in amdgpu_debugfs_regs2_op()
256 		    (rd->id.grbm.se != 0xFFFFFFFF && rd->id.grbm.se >= adev->gfx.config.max_shader_engines)) {  in amdgpu_debugfs_regs2_op()
257 			pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
258 			pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
260 			mutex_unlock(&rd->lock);  in amdgpu_debugfs_regs2_op()
261 			return -EINVAL;  in amdgpu_debugfs_regs2_op()
263 		mutex_lock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_regs2_op()
264 		amdgpu_gfx_select_se_sh(adev, rd->id.grbm.se,  in amdgpu_debugfs_regs2_op()
265 								rd->id.grbm.sh,  in amdgpu_debugfs_regs2_op()
266 								rd->id.grbm.instance);  in amdgpu_debugfs_regs2_op()
269 	if (rd->id.use_srbm) {  in amdgpu_debugfs_regs2_op()
270 		mutex_lock(&adev->srbm_mutex);  in amdgpu_debugfs_regs2_op()
271 		amdgpu_gfx_select_me_pipe_q(adev, rd->id.srbm.me, rd->id.srbm.pipe,  in amdgpu_debugfs_regs2_op()
272 									rd->id.srbm.queue, rd->id.srbm.vmid);  in amdgpu_debugfs_regs2_op()
275 	if (rd->id.pg_lock)  in amdgpu_debugfs_regs2_op()
276 		mutex_lock(&adev->pm.mutex);  in amdgpu_debugfs_regs2_op()
292 		size -= 4;  in amdgpu_debugfs_regs2_op()
297 	if (rd->id.use_grbm) {  in amdgpu_debugfs_regs2_op()
299 		mutex_unlock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_regs2_op()
302 	if (rd->id.use_srbm) {  in amdgpu_debugfs_regs2_op()
304 		mutex_unlock(&adev->srbm_mutex);  in amdgpu_debugfs_regs2_op()
307 	if (rd->id.pg_lock)  in amdgpu_debugfs_regs2_op()
308 		mutex_unlock(&adev->pm.mutex);  in amdgpu_debugfs_regs2_op()
310 	mutex_unlock(&rd->lock);  in amdgpu_debugfs_regs2_op()
312 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
313 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs2_op()
321 	struct amdgpu_debugfs_regs2_data *rd = f->private_data;  in amdgpu_debugfs_regs2_ioctl()
326 		mutex_lock(&rd->lock);  in amdgpu_debugfs_regs2_ioctl()
327 		r = copy_from_user(&rd->id, (struct amdgpu_debugfs_regs2_iocdata *)data, sizeof rd->id);  in amdgpu_debugfs_regs2_ioctl()
328 		mutex_unlock(&rd->lock);  in amdgpu_debugfs_regs2_ioctl()
329 		return r ? -EINVAL : 0;  in amdgpu_debugfs_regs2_ioctl()
331 		return -EINVAL;  in amdgpu_debugfs_regs2_ioctl()
348  * amdgpu_debugfs_regs_pcie_read - Read from a PCIE register
351  * @buf: User buffer to store read data in
352  * @size: Number of bytes to read
355  * The lower bits are the BYTE offset of the register to read.  This
362 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_pcie_read()
367 		return -EINVAL;  in amdgpu_debugfs_regs_pcie_read()
369 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_read()
371 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_read()
377 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_read()
387 			goto out;  in amdgpu_debugfs_regs_pcie_read()
392 		size -= 4;  in amdgpu_debugfs_regs_pcie_read()
396 out:  in amdgpu_debugfs_regs_pcie_read()
397 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_read()
398 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_read()
404  * amdgpu_debugfs_regs_pcie_write - Write to a PCIE register
418 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_pcie_write()
423 		return -EINVAL;  in amdgpu_debugfs_regs_pcie_write()
425 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_write()
427 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_write()
433 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_write()
442 			goto out;  in amdgpu_debugfs_regs_pcie_write()
449 		size -= 4;  in amdgpu_debugfs_regs_pcie_write()
453 out:  in amdgpu_debugfs_regs_pcie_write()
454 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_write()
455 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_pcie_write()
461  * amdgpu_debugfs_regs_didt_read - Read from a DIDT register
464  * @buf: User buffer to store read data in
465  * @size: Number of bytes to read
468  * The lower bits are the BYTE offset of the register to read.  This
475 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_didt_read()
480 		return -EINVAL;  in amdgpu_debugfs_regs_didt_read()
482 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_read()
484 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_read()
490 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_read()
500 			goto out;  in amdgpu_debugfs_regs_didt_read()
505 		size -= 4;  in amdgpu_debugfs_regs_didt_read()
509 out:  in amdgpu_debugfs_regs_didt_read()
510 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_read()
511 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_read()
517  * amdgpu_debugfs_regs_didt_write - Write to a DIDT register
531 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_didt_write()
536 		return -EINVAL;  in amdgpu_debugfs_regs_didt_write()
538 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_write()
540 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_write()
546 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_write()
555 			goto out;  in amdgpu_debugfs_regs_didt_write()
562 		size -= 4;  in amdgpu_debugfs_regs_didt_write()
566 out:  in amdgpu_debugfs_regs_didt_write()
567 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_write()
568 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_didt_write()
574  * amdgpu_debugfs_regs_smc_read - Read from a SMC register
577  * @buf: User buffer to store read data in
578  * @size: Number of bytes to read
581  * The lower bits are the BYTE offset of the register to read.  This
588 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_smc_read()
593 		return -EINVAL;  in amdgpu_debugfs_regs_smc_read()
595 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_read()
597 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_read()
603 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_read()
613 			goto out;  in amdgpu_debugfs_regs_smc_read()
618 		size -= 4;  in amdgpu_debugfs_regs_smc_read()
622 out:  in amdgpu_debugfs_regs_smc_read()
623 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_read()
624 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_read()
630  * amdgpu_debugfs_regs_smc_write - Write to a SMC register
644 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_regs_smc_write()
649 		return -EINVAL;  in amdgpu_debugfs_regs_smc_write()
651 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_write()
653 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_write()
659 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_write()
668 			goto out;  in amdgpu_debugfs_regs_smc_write()
675 		size -= 4;  in amdgpu_debugfs_regs_smc_write()
679 out:  in amdgpu_debugfs_regs_smc_write()
680 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_write()
681 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_regs_smc_write()
687  * amdgpu_debugfs_gca_config_read - Read from gfx config data
690  * @buf: User buffer to store read data in
691  * @size: Number of bytes to read
697  * end so that older software can still read the data.
703 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gca_config_read()
709 		return -EINVAL;  in amdgpu_debugfs_gca_config_read()
713 		return -ENOMEM;  in amdgpu_debugfs_gca_config_read()
717 	config[no_regs++] = adev->gfx.config.max_shader_engines;  in amdgpu_debugfs_gca_config_read()
718 	config[no_regs++] = adev->gfx.config.max_tile_pipes;  in amdgpu_debugfs_gca_config_read()
719 	config[no_regs++] = adev->gfx.config.max_cu_per_sh;  in amdgpu_debugfs_gca_config_read()
720 	config[no_regs++] = adev->gfx.config.max_sh_per_se;  in amdgpu_debugfs_gca_config_read()
721 	config[no_regs++] = adev->gfx.config.max_backends_per_se;  in amdgpu_debugfs_gca_config_read()
722 	config[no_regs++] = adev->gfx.config.max_texture_channel_caches;  in amdgpu_debugfs_gca_config_read()
723 	config[no_regs++] = adev->gfx.config.max_gprs;  in amdgpu_debugfs_gca_config_read()
724 	config[no_regs++] = adev->gfx.config.max_gs_threads;  in amdgpu_debugfs_gca_config_read()
725 	config[no_regs++] = adev->gfx.config.max_hw_contexts;  in amdgpu_debugfs_gca_config_read()
726 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend;  in amdgpu_debugfs_gca_config_read()
727 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend;  in amdgpu_debugfs_gca_config_read()
728 	config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
729 	config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
730 	config[no_regs++] = adev->gfx.config.num_tile_pipes;  in amdgpu_debugfs_gca_config_read()
731 	config[no_regs++] = adev->gfx.config.backend_enable_mask;  in amdgpu_debugfs_gca_config_read()
732 	config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes;  in amdgpu_debugfs_gca_config_read()
733 	config[no_regs++] = adev->gfx.config.mem_row_size_in_kb;  in amdgpu_debugfs_gca_config_read()
734 	config[no_regs++] = adev->gfx.config.shader_engine_tile_size;  in amdgpu_debugfs_gca_config_read()
735 	config[no_regs++] = adev->gfx.config.num_gpus;  in amdgpu_debugfs_gca_config_read()
736 	config[no_regs++] = adev->gfx.config.multi_gpu_tile_size;  in amdgpu_debugfs_gca_config_read()
737 	config[no_regs++] = adev->gfx.config.mc_arb_ramcfg;  in amdgpu_debugfs_gca_config_read()
738 	config[no_regs++] = adev->gfx.config.gb_addr_config;  in amdgpu_debugfs_gca_config_read()
739 	config[no_regs++] = adev->gfx.config.num_rbs;  in amdgpu_debugfs_gca_config_read()
742 	config[no_regs++] = adev->rev_id;  in amdgpu_debugfs_gca_config_read()
743 	config[no_regs++] = lower_32_bits(adev->pg_flags);  in amdgpu_debugfs_gca_config_read()
744 	config[no_regs++] = lower_32_bits(adev->cg_flags);  in amdgpu_debugfs_gca_config_read()
747 	config[no_regs++] = adev->family;  in amdgpu_debugfs_gca_config_read()
748 	config[no_regs++] = adev->external_rev_id;  in amdgpu_debugfs_gca_config_read()
751 	config[no_regs++] = adev->pdev->device;  in amdgpu_debugfs_gca_config_read()
752 	config[no_regs++] = adev->pdev->revision;  in amdgpu_debugfs_gca_config_read()
753 	config[no_regs++] = adev->pdev->subsystem_device;  in amdgpu_debugfs_gca_config_read()
754 	config[no_regs++] = adev->pdev->subsystem_vendor;  in amdgpu_debugfs_gca_config_read()
757 	config[no_regs++] = adev->flags & AMD_IS_APU ? 1 : 0;  in amdgpu_debugfs_gca_config_read()
760 	config[no_regs++] = upper_32_bits(adev->pg_flags);  in amdgpu_debugfs_gca_config_read()
761 	config[no_regs++] = upper_32_bits(adev->cg_flags);  in amdgpu_debugfs_gca_config_read()
776 		size -= 4;  in amdgpu_debugfs_gca_config_read()
784  * amdgpu_debugfs_sensor_read - Read from the powerplay sensors
787  * @buf: User buffer to store read data in
788  * @size: Number of bytes to read
793  * 'amd_pp_sensors' enumeration.  For instance to read the UVD VCLK
799 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_sensor_read()
804 		return -EINVAL;  in amdgpu_debugfs_sensor_read()
806 	if (!adev->pm.dpm_enabled)  in amdgpu_debugfs_sensor_read()
807 		return -EINVAL;  in amdgpu_debugfs_sensor_read()
814 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sensor_read()
816 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sensor_read()
822 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sensor_read()
828 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sensor_read()
829 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sensor_read()
838 		return -EINVAL;  in amdgpu_debugfs_sensor_read()
847 			size -= 4;  in amdgpu_debugfs_sensor_read()
856 /** amdgpu_debugfs_wave_read - Read WAVE STATUS data
859  * @buf: User buffer to store read data in
860  * @size: Number of bytes to read
880 	struct amdgpu_device *adev = f->f_inode->i_private;  in amdgpu_debugfs_wave_read()
886 		return -EINVAL;  in amdgpu_debugfs_wave_read()
896 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_wave_read()
898 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_wave_read()
904 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_wave_read()
909 	mutex_lock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_wave_read()
913 	if (adev->gfx.funcs->read_wave_data)  in amdgpu_debugfs_wave_read()
914 		adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x);  in amdgpu_debugfs_wave_read()
917 	mutex_unlock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_wave_read()
919 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_wave_read()
920 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_wave_read()
924 		return -EINVAL;  in amdgpu_debugfs_wave_read()
940 		size -= 4;  in amdgpu_debugfs_wave_read()
947 /** amdgpu_debugfs_gpr_read - Read wave gprs
950  * @buf: User buffer to store read data in
951  * @size: Number of bytes to read
972 	struct amdgpu_device *adev = f->f_inode->i_private;  in amdgpu_debugfs_gpr_read()
978 		return -EINVAL;  in amdgpu_debugfs_gpr_read()
992 		return -ENOMEM;  in amdgpu_debugfs_gpr_read()
994 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gpr_read()
1003 	mutex_lock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_gpr_read()
1007 		if (adev->gfx.funcs->read_wave_vgprs)  in amdgpu_debugfs_gpr_read()
1008 			adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data);  in amdgpu_debugfs_gpr_read()
1010 		if (adev->gfx.funcs->read_wave_sgprs)  in amdgpu_debugfs_gpr_read()
1011 			adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data);  in amdgpu_debugfs_gpr_read()
1015 	mutex_unlock(&adev->grbm_idx_mutex);  in amdgpu_debugfs_gpr_read()
1017 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gpr_read()
1018 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gpr_read()
1032 		size -= 4;  in amdgpu_debugfs_gpr_read()
1040 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gpr_read()
1046  * amdgpu_debugfs_gfxoff_residency_read - Read GFXOFF residency
1049  * @buf: User buffer to store read data in
1050  * @size: Number of bytes to read
1053  * Read the last residency value logged. It doesn't auto update, one needs to
1059 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_residency_read()
1064 		return -EINVAL;  in amdgpu_debugfs_gfxoff_residency_read()
1066 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_read()
1068 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_read()
1077 			goto out;  in amdgpu_debugfs_gfxoff_residency_read()
1081 			goto out;  in amdgpu_debugfs_gfxoff_residency_read()
1086 		size -= 4;  in amdgpu_debugfs_gfxoff_residency_read()
1090 out:  in amdgpu_debugfs_gfxoff_residency_read()
1091 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_read()
1092 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_read()
1098  * amdgpu_debugfs_gfxoff_residency_write - Log GFXOFF Residency
1105  * Write a 32-bit non-zero to start logging; write a 32-bit zero to stop
1110 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_residency_write()
1115 		return -EINVAL;  in amdgpu_debugfs_gfxoff_residency_write()
1117 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_write()
1119 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_write()
1128 			goto out;  in amdgpu_debugfs_gfxoff_residency_write()
1135 		size -= 4;  in amdgpu_debugfs_gfxoff_residency_write()
1139 out:  in amdgpu_debugfs_gfxoff_residency_write()
1140 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_write()
1141 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_residency_write()
1148  * amdgpu_debugfs_gfxoff_count_read - Read GFXOFF entry count
1151  * @buf: User buffer to store read data in
1152  * @size: Number of bytes to read
1158 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_count_read()
1163 		return -EINVAL;  in amdgpu_debugfs_gfxoff_count_read()
1165 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_count_read()
1167 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_count_read()
1176 			goto out;  in amdgpu_debugfs_gfxoff_count_read()
1180 			goto out;  in amdgpu_debugfs_gfxoff_count_read()
1185 		size -= 4;  in amdgpu_debugfs_gfxoff_count_read()
1189 out:  in amdgpu_debugfs_gfxoff_count_read()
1190 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_count_read()
1191 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_count_read()
1197  * amdgpu_debugfs_gfxoff_write - Enable/disable GFXOFF
1204  * Write a 32-bit zero to disable or a 32-bit non-zero to enable
1209 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_write()
1214 		return -EINVAL;  in amdgpu_debugfs_gfxoff_write()
1216 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_write()
1218 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_write()
1227 			goto out;  in amdgpu_debugfs_gfxoff_write()
1234 		size -= 4;  in amdgpu_debugfs_gfxoff_write()
1238 out:  in amdgpu_debugfs_gfxoff_write()
1239 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_write()
1240 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_write()
1247  * amdgpu_debugfs_gfxoff_read - read gfxoff status
1250  * @buf: User buffer to store read data in
1251  * @size: Number of bytes to read
1257 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_read()
1262 		return -EINVAL;  in amdgpu_debugfs_gfxoff_read()
1264 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_read()
1266 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_read()
1271 		u32 value = adev->gfx.gfx_off_state;  in amdgpu_debugfs_gfxoff_read()
1275 			goto out;  in amdgpu_debugfs_gfxoff_read()
1280 		size -= 4;  in amdgpu_debugfs_gfxoff_read()
1284 out:  in amdgpu_debugfs_gfxoff_read()
1285 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_read()
1286 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_read()
1294 	struct amdgpu_device *adev = file_inode(f)->i_private;  in amdgpu_debugfs_gfxoff_status_read()
1299 		return -EINVAL;  in amdgpu_debugfs_gfxoff_status_read()
1301 	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_status_read()
1303 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_status_read()
1312 			goto out;  in amdgpu_debugfs_gfxoff_status_read()
1316 			goto out;  in amdgpu_debugfs_gfxoff_status_read()
1321 		size -= 4;  in amdgpu_debugfs_gfxoff_status_read()
1325 out:  in amdgpu_debugfs_gfxoff_status_read()
1326 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_status_read()
1327 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_gfxoff_status_read()
1335 	.read = amdgpu_debugfs_regs2_read,
1344 	.read = amdgpu_debugfs_regs_read,
1350 	.read = amdgpu_debugfs_regs_didt_read,
1356 	.read = amdgpu_debugfs_regs_pcie_read,
1362 	.read = amdgpu_debugfs_regs_smc_read,
1369 	.read = amdgpu_debugfs_gca_config_read,
1375 	.read = amdgpu_debugfs_sensor_read,
1381 	.read = amdgpu_debugfs_wave_read,
1386 	.read = amdgpu_debugfs_gpr_read,
1392 	.read = amdgpu_debugfs_gfxoff_read,
1399 	.read = amdgpu_debugfs_gfxoff_status_read,
1405 	.read = amdgpu_debugfs_gfxoff_count_read,
1411 	.read = amdgpu_debugfs_gfxoff_residency_read,
1449  * amdgpu_debugfs_regs_init -	Initialize debugfs entries that provide
1456 	struct drm_minor *minor = adev_to_drm(adev)->primary;  in amdgpu_debugfs_regs_init()
1457 	struct dentry *ent, *root = minor->debugfs_root;  in amdgpu_debugfs_regs_init()
1465 			i_size_write(ent->d_inode, adev->rmmio_size);  in amdgpu_debugfs_regs_init()
1473 	struct amdgpu_device *adev = (struct amdgpu_device *)m->private;  in amdgpu_debugfs_test_ib_show()
1477 	r = pm_runtime_get_sync(dev->dev);  in amdgpu_debugfs_test_ib_show()
1479 		pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_test_ib_show()
1484 	r = down_write_killable(&adev->reset_domain->sem);  in amdgpu_debugfs_test_ib_show()
1490 		struct amdgpu_ring *ring = adev->rings[i];  in amdgpu_debugfs_test_ib_show()
1492 		if (!ring || !ring->sched.thread)  in amdgpu_debugfs_test_ib_show()
1494 		kthread_park(ring->sched.thread);  in amdgpu_debugfs_test_ib_show()
1506 		struct amdgpu_ring *ring = adev->rings[i];  in amdgpu_debugfs_test_ib_show()
1508 		if (!ring || !ring->sched.thread)  in amdgpu_debugfs_test_ib_show()
1510 		kthread_unpark(ring->sched.thread);  in amdgpu_debugfs_test_ib_show()
1513 	up_write(&adev->reset_domain->sem);  in amdgpu_debugfs_test_ib_show()
1515 	pm_runtime_mark_last_busy(dev->dev);  in amdgpu_debugfs_test_ib_show()
1516 	pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_test_ib_show()
1527 	r = pm_runtime_get_sync(dev->dev);  in amdgpu_debugfs_evict_vram()
1529 		pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_evict_vram()
1535 	pm_runtime_mark_last_busy(dev->dev);  in amdgpu_debugfs_evict_vram()
1536 	pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_evict_vram()
1548 	r = pm_runtime_get_sync(dev->dev);  in amdgpu_debugfs_evict_gtt()
1550 		pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_evict_gtt()
1556 	pm_runtime_mark_last_busy(dev->dev);  in amdgpu_debugfs_evict_gtt()
1557 	pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_evict_gtt()
1568 	r = pm_runtime_get_sync(dev->dev);  in amdgpu_debugfs_benchmark()
1570 		pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_benchmark()
1576 	pm_runtime_mark_last_busy(dev->dev);  in amdgpu_debugfs_benchmark()
1577 	pm_runtime_put_autosuspend(dev->dev);  in amdgpu_debugfs_benchmark()
1584 	struct amdgpu_device *adev = (struct amdgpu_device *)m->private;  in amdgpu_debugfs_vm_info_show()
1589 	r = mutex_lock_interruptible(&dev->filelist_mutex);  in amdgpu_debugfs_vm_info_show()
1593 	list_for_each_entry(file, &dev->filelist, lhead) {  in amdgpu_debugfs_vm_info_show()
1594 		struct amdgpu_fpriv *fpriv = file->driver_priv;  in amdgpu_debugfs_vm_info_show()
1595 		struct amdgpu_vm *vm = &fpriv->vm;  in amdgpu_debugfs_vm_info_show()
1597 		seq_printf(m, "pid:%d\tProcess:%s ----------\n",  in amdgpu_debugfs_vm_info_show()
1598 				vm->task_info.pid, vm->task_info.process_name);  in amdgpu_debugfs_vm_info_show()
1599 		r = amdgpu_bo_reserve(vm->root.bo, true);  in amdgpu_debugfs_vm_info_show()
1603 		amdgpu_bo_unreserve(vm->root.bo);  in amdgpu_debugfs_vm_info_show()
1606 	mutex_unlock(&dev->filelist_mutex);  in amdgpu_debugfs_vm_info_show()
1623 	struct amdgpu_fence_driver *drv = &ring->fence_drv;  in amdgpu_ib_preempt_fences_swap()
1626 	last_seq = atomic_read(&ring->fence_drv.last_seq);  in amdgpu_ib_preempt_fences_swap()
1627 	sync_seq = ring->fence_drv.sync_seq;  in amdgpu_ib_preempt_fences_swap()
1629 	last_seq &= drv->num_fences_mask;  in amdgpu_ib_preempt_fences_swap()
1630 	sync_seq &= drv->num_fences_mask;  in amdgpu_ib_preempt_fences_swap()
1636 		last_seq &= drv->num_fences_mask;  in amdgpu_ib_preempt_fences_swap()
1637 		ptr = &drv->fences[last_seq];  in amdgpu_ib_preempt_fences_swap()
1670 	spin_lock(&sched->job_list_lock);  in amdgpu_ib_preempt_job_recovery()
1671 	list_for_each_entry(s_job, &sched->pending_list, list) {  in amdgpu_ib_preempt_job_recovery()
1672 		fence = sched->ops->run_job(s_job);  in amdgpu_ib_preempt_job_recovery()
1675 	spin_unlock(&sched->job_list_lock);  in amdgpu_ib_preempt_job_recovery()
1684 	struct amdgpu_fence_driver *drv = &ring->fence_drv;  in amdgpu_ib_preempt_mark_partial_job()
1685 	struct drm_gpu_scheduler *sched = &ring->sched;  in amdgpu_ib_preempt_mark_partial_job()
1688 	if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)  in amdgpu_ib_preempt_mark_partial_job()
1691 	preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2));  in amdgpu_ib_preempt_mark_partial_job()
1692 	if (preempt_seq <= atomic_read(&drv->last_seq)) {  in amdgpu_ib_preempt_mark_partial_job()
1697 	preempt_seq &= drv->num_fences_mask;  in amdgpu_ib_preempt_mark_partial_job()
1698 	ptr = &drv->fences[preempt_seq];  in amdgpu_ib_preempt_mark_partial_job()
1702 	spin_lock(&sched->job_list_lock);  in amdgpu_ib_preempt_mark_partial_job()
1703 	list_for_each_entry_safe(s_job, tmp, &sched->pending_list, list) {  in amdgpu_ib_preempt_mark_partial_job()
1704 		if (dma_fence_is_signaled(&s_job->s_fence->finished)) {  in amdgpu_ib_preempt_mark_partial_job()
1706 			list_del_init(&s_job->list);  in amdgpu_ib_preempt_mark_partial_job()
1707 			sched->ops->free_job(s_job);  in amdgpu_ib_preempt_mark_partial_job()
1711 		if (preempted && (&job->hw_fence) == fence)  in amdgpu_ib_preempt_mark_partial_job()
1713 			job->preemption_status |= AMDGPU_IB_PREEMPTED;  in amdgpu_ib_preempt_mark_partial_job()
1715 	spin_unlock(&sched->job_list_lock);  in amdgpu_ib_preempt_mark_partial_job()
1726 		return -EINVAL;  in amdgpu_debugfs_ib_preempt()
1728 	ring = adev->rings[val];  in amdgpu_debugfs_ib_preempt()
1730 	if (!ring || !ring->funcs->preempt_ib || !ring->sched.thread)  in amdgpu_debugfs_ib_preempt()
1731 		return -EINVAL;  in amdgpu_debugfs_ib_preempt()
1734 	if (ring->trail_seq != le32_to_cpu(*ring->trail_fence_cpu_addr))  in amdgpu_debugfs_ib_preempt()
1735 		return -EBUSY;  in amdgpu_debugfs_ib_preempt()
1737 	length = ring->fence_drv.num_fences_mask + 1;  in amdgpu_debugfs_ib_preempt()
1740 		return -ENOMEM;  in amdgpu_debugfs_ib_preempt()
1743 	r = down_read_killable(&adev->reset_domain->sem);  in amdgpu_debugfs_ib_preempt()
1748 	kthread_park(ring->sched.thread);  in amdgpu_debugfs_ib_preempt()
1750 	resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev);  in amdgpu_debugfs_ib_preempt()
1755 		DRM_WARN("failed to preempt ring %d\n", ring->idx);  in amdgpu_debugfs_ib_preempt()
1761 	if (atomic_read(&ring->fence_drv.last_seq) !=  in amdgpu_debugfs_ib_preempt()
1762 	    ring->fence_drv.sync_seq) {  in amdgpu_debugfs_ib_preempt()
1763 		DRM_INFO("ring %d was preempted\n", ring->idx);  in amdgpu_debugfs_ib_preempt()
1767 		/* swap out the old fences */  in amdgpu_debugfs_ib_preempt()
1773 		amdgpu_ib_preempt_job_recovery(&ring->sched);  in amdgpu_debugfs_ib_preempt()
1784 	kthread_unpark(ring->sched.thread);  in amdgpu_debugfs_ib_preempt()
1786 	up_read(&adev->reset_domain->sem);  in amdgpu_debugfs_ib_preempt()
1788 	ttm_bo_unlock_delayed_workqueue(&adev->mman.bdev, resched);  in amdgpu_debugfs_ib_preempt()
1803 		return -EINVAL;  in amdgpu_debugfs_sclk_set()
1805 	ret = pm_runtime_get_sync(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sclk_set()
1807 		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sclk_set()
1812 	if (ret == -EOPNOTSUPP) {  in amdgpu_debugfs_sclk_set()
1814 		goto out;  in amdgpu_debugfs_sclk_set()
1817 		ret = -EINVAL;  in amdgpu_debugfs_sclk_set()
1818 		goto out;  in amdgpu_debugfs_sclk_set()
1823 		ret = -EINVAL;  in amdgpu_debugfs_sclk_set()
1825 out:  in amdgpu_debugfs_sclk_set()
1826 	pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sclk_set()
1827 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);  in amdgpu_debugfs_sclk_set()
1841 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;  in amdgpu_reset_dump_register_list_read()
1849 	ret = down_read_killable(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_read()
1853 	for (i = 0; i < adev->num_regs; i++) {  in amdgpu_reset_dump_register_list_read()
1854 		sprintf(reg_offset, "0x%x\n", adev->reset_dump_reg_list[i]);  in amdgpu_reset_dump_register_list_read()
1855 		up_read(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_read()
1857 			return -EFAULT;  in amdgpu_reset_dump_register_list_read()
1860 		ret = down_read_killable(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_read()
1865 	up_read(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_read()
1874 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;  in amdgpu_reset_dump_register_list_write()
1882 					min(10, ((int)size-len)))) {  in amdgpu_reset_dump_register_list_write()
1883 			ret = -EFAULT;  in amdgpu_reset_dump_register_list_write()
1889 			ret = -ENOMEM;  in amdgpu_reset_dump_register_list_write()
1894 			ret = -EINVAL;  in amdgpu_reset_dump_register_list_write()
1904 		ret = -ENOMEM;  in amdgpu_reset_dump_register_list_write()
1907 	ret = down_write_killable(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_write()
1911 	swap(adev->reset_dump_reg_list, tmp);  in amdgpu_reset_dump_register_list_write()
1912 	swap(adev->reset_dump_reg_value, new);  in amdgpu_reset_dump_register_list_write()
1913 	adev->num_regs = i;  in amdgpu_reset_dump_register_list_write()
1914 	up_write(&adev->reset_domain->sem);  in amdgpu_reset_dump_register_list_write()
1926 	.read = amdgpu_reset_dump_register_list_read,
1933 	struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;  in amdgpu_debugfs_init()
1941 			   &adev->pm.smu_debug_mask);  in amdgpu_debugfs_init()
1977 		struct amdgpu_ring *ring = adev->rings[i];  in amdgpu_debugfs_init()
1985 	for ( i = 0; i < adev->vcn.num_vcn_inst; i++) {  in amdgpu_debugfs_init()
1989 		if (adev->vcn.harvest_config & (1 << i))  in amdgpu_debugfs_init()
1992 		amdgpu_debugfs_vcn_fwlog_init(adev, i, &adev->vcn.inst[i]);  in amdgpu_debugfs_init()
2013 	adev->debugfs_vbios_blob.data = adev->bios;  in amdgpu_debugfs_init()
2014 	adev->debugfs_vbios_blob.size = adev->bios_size;  in amdgpu_debugfs_init()
2016 			    &adev->debugfs_vbios_blob);  in amdgpu_debugfs_init()
2018 	adev->debugfs_discovery_blob.data = adev->mman.discovery_bin;  in amdgpu_debugfs_init()
2019 	adev->debugfs_discovery_blob.size = adev->mman.discovery_tmr_size;  in amdgpu_debugfs_init()
2021 			    &adev->debugfs_discovery_blob);  in amdgpu_debugfs_init()