118 	struct amdgpu_device		*adev;
285 struct amdgpu_device;
331 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
333 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
335 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
364 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
369 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
372 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
378 bool amdgpu_get_bios(struct amdgpu_device *adev);
379 bool amdgpu_read_bios(struct amdgpu_device *adev);
380 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
460 	struct amdgpu_device		*adev;
501 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
502 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
507 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
551 	bool (*read_disabled_bios)(struct amdgpu_device *adev);
552 	bool (*read_bios_from_rom)(struct amdgpu_device *adev,
554 	int (*read_register)(struct amdgpu_device *adev, u32 se_num,
556 	void (*set_vga_state)(struct amdgpu_device *adev, bool state);
557 	int (*reset)(struct amdgpu_device *adev);
558 	enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
560 	u32 (*get_xclk)(struct amdgpu_device *adev);
562 	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
563 	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
565 	int (*get_pcie_lanes)(struct amdgpu_device *adev);
566 	void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
568 	u32 (*get_config_memsize)(struct amdgpu_device *adev);
570 	void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
572 	void (*invalidate_hdp)(struct amdgpu_device *adev,
575 	bool (*need_full_reset)(struct amdgpu_device *adev);
577 	void (*init_doorbell_index)(struct amdgpu_device *adev);
579 	void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
582 	bool (*need_reset_on_init)(struct amdgpu_device *adev);
584 	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
586 	bool (*supports_baco)(struct amdgpu_device *adev);
588 	void (*pre_asic_init)(struct amdgpu_device *adev);
590 	int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
592 	int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
619 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
625 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
626 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
628 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
629 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
631 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
632 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
748 	int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
757 struct amdgpu_device {  struct
1068 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)  in drm_to_adev()  argument
1070 	return container_of(ddev, struct amdgpu_device, ddev);  in drm_to_adev()
1073 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)  in adev_to_drm()
1078 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)  in amdgpu_ttm_adev()
1080 	return container_of(bdev, struct amdgpu_device, mman.bdev);  in amdgpu_ttm_adev()
1083 int amdgpu_device_init(struct amdgpu_device *adev,
1085 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1086 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1088 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1090 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1092 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1095 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1097 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1099 void amdgpu_device_wreg(struct amdgpu_device *adev,
1102 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1104 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1105 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1107 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1110 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1113 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1116 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1121 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1123 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1129 int emu_soc_asic_init(struct amdgpu_device *adev);
1256 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1257 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1258 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1261 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1262 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1263 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1264 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1266 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1268 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1269 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1273 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1279 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1280 				      struct amdgpu_device *peer_adev);
1284 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1286 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1289 void amdgpu_device_halt(struct amdgpu_device *adev);
1290 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1292 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1294 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1296 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1327 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1335 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
1372 int amdgpu_acpi_init(struct amdgpu_device *adev);
1373 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1374 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1376 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1378 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1381 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1386 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }  in amdgpu_acpi_init()
1387 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }  in amdgpu_acpi_fini()
1390 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,  in amdgpu_acpi_power_shift_control()
1397 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1398 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1399 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1401 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s0ix_active()
1402 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_should_gpu_reset()
1403 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s3_active()
1407 int amdgpu_dm_display_resume(struct amdgpu_device *adev );
1409 static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; }  in amdgpu_dm_display_resume()
1413 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1414 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1425 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1427 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1429 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1432 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev)  in amdgpu_device_has_timeouts_enabled()
1443 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)  in amdgpu_is_tmz()
1448 int amdgpu_in_reset(struct amdgpu_device *adev);