Lines Matching full:gpio
3 * Xilinx Zynq GPIO device driver
10 #include <linux/gpio/driver.h>
20 #define DRIVER_NAME "zynq-gpio"
63 /* Register offsets for the GPIO device */
96 /* GPIO upper 16 bit mask */
117 * struct zynq_gpio - gpio device private data structure
119 * @base_addr: base address of the GPIO device
121 * @irq: interrupt for the GPIO device
137 * struct zynq_platform_data - zynq gpio platform data structure
138 * @label: string to store in gpio->label
140 * @ngpio: max number of gpio pins
141 * @max_bank: maximum number of gpio banks
159 * @gpio: Pointer to driver data struct
163 static int zynq_gpio_is_zynq(struct zynq_gpio *gpio) in zynq_gpio_is_zynq() argument
165 return !!(gpio->p_data->quirks & ZYNQ_GPIO_QUIRK_IS_ZYNQ); in zynq_gpio_is_zynq()
170 * @gpio: Pointer to driver data struct
174 static int gpio_data_ro_bug(struct zynq_gpio *gpio) in gpio_data_ro_bug() argument
176 return !!(gpio->p_data->quirks & GPIO_QUIRK_DATA_RO_BUG); in gpio_data_ro_bug()
181 * for a given pin in the GPIO device
182 * @pin_num: gpio pin number within the device
183 * @bank_num: an output parameter used to return the bank number of the gpio
186 * for the given gpio pin
187 * @gpio: gpio device data structure
194 struct zynq_gpio *gpio) in zynq_gpio_get_bank_pin() argument
198 for (bank = 0; bank < gpio->p_data->max_bank; bank++) { in zynq_gpio_get_bank_pin()
199 if ((pin_num >= gpio->p_data->bank_min[bank]) && in zynq_gpio_get_bank_pin()
200 (pin_num <= gpio->p_data->bank_max[bank])) { in zynq_gpio_get_bank_pin()
203 gpio->p_data->bank_min[bank]; in zynq_gpio_get_bank_pin()
206 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_get_bank_pin()
211 WARN(true, "invalid GPIO pin number: %u", pin_num); in zynq_gpio_get_bank_pin()
217 * zynq_gpio_get_value - Get the state of the specified pin of GPIO device
219 * @pin: gpio pin number within the device
221 * This function reads the state of the specified pin of the GPIO device.
229 struct zynq_gpio *gpio = gpiochip_get_data(chip); in zynq_gpio_get_value() local
231 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_get_value()
233 if (gpio_data_ro_bug(gpio)) { in zynq_gpio_get_value()
234 if (zynq_gpio_is_zynq(gpio)) { in zynq_gpio_get_value()
236 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
239 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
244 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
247 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
252 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
261 * @pin: gpio pin number within the device
266 * gpio pin to the specified value. The state is either 0 or non-zero.
272 struct zynq_gpio *gpio = gpiochip_get_data(chip); in zynq_gpio_set_value() local
274 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_set_value()
292 writel_relaxed(state, gpio->base_addr + reg_offset); in zynq_gpio_set_value()
296 * zynq_gpio_dir_in - Set the direction of the specified GPIO pin as input
298 * @pin: gpio pin number within the device
301 * the gpio pin as input.
310 struct zynq_gpio *gpio = gpiochip_get_data(chip); in zynq_gpio_dir_in() local
312 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_dir_in()
318 if (zynq_gpio_is_zynq(gpio) && bank_num == 0 && in zynq_gpio_dir_in()
323 spin_lock_irqsave(&gpio->dirlock, flags); in zynq_gpio_dir_in()
324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
326 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
327 spin_unlock_irqrestore(&gpio->dirlock, flags); in zynq_gpio_dir_in()
333 * zynq_gpio_dir_out - Set the direction of the specified GPIO pin as output
335 * @pin: gpio pin number within the device
338 * This function sets the direction of specified GPIO pin as output, configures
350 struct zynq_gpio *gpio = gpiochip_get_data(chip); in zynq_gpio_dir_out() local
352 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_dir_out()
354 /* set the GPIO pin as output */ in zynq_gpio_dir_out()
355 spin_lock_irqsave(&gpio->dirlock, flags); in zynq_gpio_dir_out()
356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
358 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
361 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out()
363 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out()
364 spin_unlock_irqrestore(&gpio->dirlock, flags); in zynq_gpio_dir_out()
372 * zynq_gpio_get_direction - Read the direction of the specified GPIO pin
374 * @pin: gpio pin number within the device
376 * This function returns the direction of the specified GPIO.
384 struct zynq_gpio *gpio = gpiochip_get_data(chip); in zynq_gpio_get_direction() local
386 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_get_direction()
388 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_get_direction()
397 * zynq_gpio_irq_mask - Disable the interrupts for a gpio pin
400 * This function calculates gpio pin number from irq number and sets the
407 struct zynq_gpio *gpio = in zynq_gpio_irq_mask() local
411 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_mask()
413 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); in zynq_gpio_irq_mask()
417 * zynq_gpio_irq_unmask - Enable the interrupts for a gpio pin
418 * @irq_data: irq data containing irq number of gpio pin for the interrupt
421 * This function calculates the gpio pin number from irq number and sets the
428 struct zynq_gpio *gpio = in zynq_gpio_irq_unmask() local
432 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_unmask()
434 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num)); in zynq_gpio_irq_unmask()
438 * zynq_gpio_irq_ack - Acknowledge the interrupt of a gpio pin
439 * @irq_data: irq data containing irq number of gpio pin for the interrupt
442 * This function calculates gpio pin number from irq number and sets the bit
448 struct zynq_gpio *gpio = in zynq_gpio_irq_ack() local
452 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_ack()
454 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); in zynq_gpio_irq_ack()
458 * zynq_gpio_irq_enable - Enable the interrupts for a gpio pin
459 * @irq_data: irq data containing irq number of gpio pin for the interrupt
467 * The Zynq GPIO controller does not disable interrupt detection when in zynq_gpio_irq_enable()
481 * zynq_gpio_set_irq_type - Set the irq type for a gpio pin
482 * @irq_data: irq data containing irq number of gpio pin
483 * @type: interrupt type that is to be set for the gpio pin
485 * This function gets the gpio pin number and its bank from the gpio pin number
499 struct zynq_gpio *gpio = in zynq_gpio_set_irq_type() local
503 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_set_irq_type()
505 int_type = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type()
507 int_pol = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type()
509 int_any = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type()
544 gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
546 gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
548 gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
564 struct zynq_gpio *gpio = in zynq_gpio_set_wake() local
567 irq_set_irq_wake(gpio->irq, on); in zynq_gpio_set_wake()
620 static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio, in zynq_gpio_handle_bank_irq() argument
624 unsigned int bank_offset = gpio->p_data->bank_min[bank_num]; in zynq_gpio_handle_bank_irq()
625 struct irq_domain *irqdomain = gpio->chip.irq.domain; in zynq_gpio_handle_bank_irq()
636 * zynq_gpio_irqhandler - IRQ handler for the gpio banks of a gpio device
640 * gpio pin number which has triggered an interrupt. It then acks the triggered
643 * Note: A bug is reported if no handler is set for the gpio pin.
649 struct zynq_gpio *gpio = in zynq_gpio_irqhandler() local
655 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_irqhandler()
656 int_sts = readl_relaxed(gpio->base_addr + in zynq_gpio_irqhandler()
658 int_enb = readl_relaxed(gpio->base_addr + in zynq_gpio_irqhandler()
660 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb); in zynq_gpio_irqhandler()
661 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_irqhandler()
668 static void zynq_gpio_save_context(struct zynq_gpio *gpio) in zynq_gpio_save_context() argument
672 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_save_context()
673 gpio->context.datalsw[bank_num] = in zynq_gpio_save_context()
674 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
676 gpio->context.datamsw[bank_num] = in zynq_gpio_save_context()
677 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
679 gpio->context.dirm[bank_num] = readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
681 gpio->context.int_en[bank_num] = readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
683 gpio->context.int_type[bank_num] = in zynq_gpio_save_context()
684 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
686 gpio->context.int_polarity[bank_num] = in zynq_gpio_save_context()
687 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
689 gpio->context.int_any[bank_num] = in zynq_gpio_save_context()
690 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
692 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_save_context()
697 static void zynq_gpio_restore_context(struct zynq_gpio *gpio) in zynq_gpio_restore_context() argument
701 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_restore_context()
702 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + in zynq_gpio_restore_context()
704 writel_relaxed(gpio->context.datalsw[bank_num], in zynq_gpio_restore_context()
705 gpio->base_addr + in zynq_gpio_restore_context()
707 writel_relaxed(gpio->context.datamsw[bank_num], in zynq_gpio_restore_context()
708 gpio->base_addr + in zynq_gpio_restore_context()
710 writel_relaxed(gpio->context.dirm[bank_num], in zynq_gpio_restore_context()
711 gpio->base_addr + in zynq_gpio_restore_context()
713 writel_relaxed(gpio->context.int_type[bank_num], in zynq_gpio_restore_context()
714 gpio->base_addr + in zynq_gpio_restore_context()
716 writel_relaxed(gpio->context.int_polarity[bank_num], in zynq_gpio_restore_context()
717 gpio->base_addr + in zynq_gpio_restore_context()
719 writel_relaxed(gpio->context.int_any[bank_num], in zynq_gpio_restore_context()
720 gpio->base_addr + in zynq_gpio_restore_context()
722 writel_relaxed(~(gpio->context.int_en[bank_num]), in zynq_gpio_restore_context()
723 gpio->base_addr + in zynq_gpio_restore_context()
725 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_restore_context()
732 struct zynq_gpio *gpio = dev_get_drvdata(dev); in zynq_gpio_suspend() local
733 struct irq_data *data = irq_get_irq_data(gpio->irq); in zynq_gpio_suspend()
741 disable_irq(gpio->irq); in zynq_gpio_suspend()
744 zynq_gpio_save_context(gpio); in zynq_gpio_suspend()
753 struct zynq_gpio *gpio = dev_get_drvdata(dev); in zynq_gpio_resume() local
754 struct irq_data *data = irq_get_irq_data(gpio->irq); in zynq_gpio_resume()
763 enable_irq(gpio->irq); in zynq_gpio_resume()
767 zynq_gpio_restore_context(gpio); in zynq_gpio_resume()
776 struct zynq_gpio *gpio = dev_get_drvdata(dev); in zynq_gpio_runtime_suspend() local
778 clk_disable_unprepare(gpio->clk); in zynq_gpio_runtime_suspend()
785 struct zynq_gpio *gpio = dev_get_drvdata(dev); in zynq_gpio_runtime_resume() local
787 return clk_prepare_enable(gpio->clk); in zynq_gpio_runtime_resume()
874 { .compatible = "xlnx,zynq-gpio-1.0", .data = &zynq_gpio_def },
875 { .compatible = "xlnx,zynqmp-gpio-1.0", .data = &zynqmp_gpio_def },
876 { .compatible = "xlnx,versal-gpio-1.0", .data = &versal_gpio_def },
877 { .compatible = "xlnx,pmc-gpio-1.0", .data = &pmc_gpio_def },
886 * This function allocates memory resources for the gpio device and registers
887 * all the banks of the device. It will also set up interrupts for the gpio
896 struct zynq_gpio *gpio; in zynq_gpio_probe() local
901 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); in zynq_gpio_probe()
902 if (!gpio) in zynq_gpio_probe()
910 gpio->p_data = match->data; in zynq_gpio_probe()
911 platform_set_drvdata(pdev, gpio); in zynq_gpio_probe()
913 gpio->base_addr = devm_platform_ioremap_resource(pdev, 0); in zynq_gpio_probe()
914 if (IS_ERR(gpio->base_addr)) in zynq_gpio_probe()
915 return PTR_ERR(gpio->base_addr); in zynq_gpio_probe()
917 gpio->irq = platform_get_irq(pdev, 0); in zynq_gpio_probe()
918 if (gpio->irq < 0) in zynq_gpio_probe()
919 return gpio->irq; in zynq_gpio_probe()
921 /* configure the gpio chip */ in zynq_gpio_probe()
922 chip = &gpio->chip; in zynq_gpio_probe()
923 chip->label = gpio->p_data->label; in zynq_gpio_probe()
933 chip->base = of_alias_get_id(pdev->dev.of_node, "gpio"); in zynq_gpio_probe()
934 chip->ngpio = gpio->p_data->ngpio; in zynq_gpio_probe()
936 /* Retrieve GPIO clock */ in zynq_gpio_probe()
937 gpio->clk = devm_clk_get(&pdev->dev, NULL); in zynq_gpio_probe()
938 if (IS_ERR(gpio->clk)) in zynq_gpio_probe()
939 return dev_err_probe(&pdev->dev, PTR_ERR(gpio->clk), "input clock not found.\n"); in zynq_gpio_probe()
941 ret = clk_prepare_enable(gpio->clk); in zynq_gpio_probe()
947 spin_lock_init(&gpio->dirlock); in zynq_gpio_probe()
956 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_probe()
957 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + in zynq_gpio_probe()
959 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_probe()
963 /* Set up the GPIO irqchip */ in zynq_gpio_probe()
975 girq->parents[0] = gpio->irq; in zynq_gpio_probe()
979 /* report a bug if gpio chip registration fails */ in zynq_gpio_probe()
980 ret = gpiochip_add_data(chip, gpio); in zynq_gpio_probe()
982 dev_err(&pdev->dev, "Failed to add gpio chip\n"); in zynq_gpio_probe()
986 irq_set_status_flags(gpio->irq, IRQ_DISABLE_UNLAZY); in zynq_gpio_probe()
996 clk_disable_unprepare(gpio->clk); in zynq_gpio_probe()
1009 struct zynq_gpio *gpio = platform_get_drvdata(pdev); in zynq_gpio_remove() local
1015 gpiochip_remove(&gpio->chip); in zynq_gpio_remove()
1016 clk_disable_unprepare(gpio->clk); in zynq_gpio_remove()
1035 MODULE_DESCRIPTION("Zynq GPIO driver");