Lines Matching +full:iproc +full:- +full:gpio +full:- +full:cca
1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/gpio/driver.h>
48 int pin = d->hwirq; in iproc_gpio_irq_ack()
50 u32 irq = d->irq; in iproc_gpio_irq_ack()
53 spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_ack()
58 chip->base + IPROC_GPIO_CCA_INT_EVENT); in iproc_gpio_irq_ack()
60 spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_ack()
67 int pin = d->hwirq; in iproc_gpio_irq_unmask()
69 u32 irq = d->irq; in iproc_gpio_irq_unmask()
72 spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_unmask()
74 event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_unmask()
75 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_unmask()
80 chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_unmask()
84 chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_unmask()
86 spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_unmask()
93 int pin = d->hwirq; in iproc_gpio_irq_mask()
95 u32 irq = d->irq; in iproc_gpio_irq_mask()
98 spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_mask()
100 event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_mask()
101 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_mask()
106 chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_mask()
110 chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_mask()
112 spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_mask()
119 int pin = d->hwirq; in iproc_gpio_irq_set_type()
121 u32 irq = d->irq; in iproc_gpio_irq_set_type()
125 spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_set_type()
128 event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE); in iproc_gpio_irq_set_type()
130 writel_relaxed(event_pol, chip->base + IPROC_GPIO_CCA_INT_EDGE); in iproc_gpio_irq_set_type()
133 event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE); in iproc_gpio_irq_set_type()
135 writel_relaxed(event_pol, chip->base + IPROC_GPIO_CCA_INT_EDGE); in iproc_gpio_irq_set_type()
138 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
140 writel_relaxed(int_pol, chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
143 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
145 writel_relaxed(int_pol, chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
149 ret = -EINVAL; in iproc_gpio_irq_set_type()
159 spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_set_type()
173 int_status = readl_relaxed(chip->intr + IPROC_CCA_INT_STS); in iproc_gpio_irq_handler()
179 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_handler()
180 event &= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT); in iproc_gpio_irq_handler()
181 level = readl_relaxed(chip->base + IPROC_GPIO_CCA_DIN); in iproc_gpio_irq_handler()
182 level ^= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_handler()
184 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_handler()
187 for_each_set_bit(bit, &int_bits, gc->ngpio) in iproc_gpio_irq_handler()
188 generic_handle_domain_irq(gc->irq.domain, bit); in iproc_gpio_irq_handler()
196 struct device *dev = &pdev->dev; in iproc_gpio_probe()
197 struct device_node *dn = pdev->dev.of_node; in iproc_gpio_probe()
204 return -ENOMEM; in iproc_gpio_probe()
206 chip->dev = dev; in iproc_gpio_probe()
208 spin_lock_init(&chip->lock); in iproc_gpio_probe()
210 chip->base = devm_platform_ioremap_resource(pdev, 0); in iproc_gpio_probe()
211 if (IS_ERR(chip->base)) in iproc_gpio_probe()
212 return PTR_ERR(chip->base); in iproc_gpio_probe()
214 ret = bgpio_init(&chip->gc, dev, 4, in iproc_gpio_probe()
215 chip->base + IPROC_GPIO_CCA_DIN, in iproc_gpio_probe()
216 chip->base + IPROC_GPIO_CCA_DOUT, in iproc_gpio_probe()
218 chip->base + IPROC_GPIO_CCA_OUT_EN, in iproc_gpio_probe()
222 dev_err(dev, "unable to init GPIO chip\n"); in iproc_gpio_probe()
226 chip->gc.label = dev_name(dev); in iproc_gpio_probe()
228 chip->gc.ngpio = num_gpios; in iproc_gpio_probe()
236 irqc = &chip->irqchip; in iproc_gpio_probe()
237 irqc->name = dev_name(dev); in iproc_gpio_probe()
238 irqc->irq_ack = iproc_gpio_irq_ack; in iproc_gpio_probe()
239 irqc->irq_mask = iproc_gpio_irq_mask; in iproc_gpio_probe()
240 irqc->irq_unmask = iproc_gpio_irq_unmask; in iproc_gpio_probe()
241 irqc->irq_set_type = iproc_gpio_irq_set_type; in iproc_gpio_probe()
243 chip->intr = devm_platform_ioremap_resource(pdev, 1); in iproc_gpio_probe()
244 if (IS_ERR(chip->intr)) in iproc_gpio_probe()
245 return PTR_ERR(chip->intr); in iproc_gpio_probe()
247 /* Enable GPIO interrupts for CCA GPIO */ in iproc_gpio_probe()
248 val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK); in iproc_gpio_probe()
250 writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK); in iproc_gpio_probe()
254 * a flow-handler because the irq is shared. in iproc_gpio_probe()
257 IRQF_SHARED, chip->gc.label, &chip->gc); in iproc_gpio_probe()
263 girq = &chip->gc.irq; in iproc_gpio_probe()
264 girq->chip = irqc; in iproc_gpio_probe()
266 girq->parent_handler = NULL; in iproc_gpio_probe()
267 girq->num_parents = 0; in iproc_gpio_probe()
268 girq->parents = NULL; in iproc_gpio_probe()
269 girq->default_type = IRQ_TYPE_NONE; in iproc_gpio_probe()
270 girq->handler = handle_simple_irq; in iproc_gpio_probe()
273 ret = devm_gpiochip_add_data(dev, &chip->gc, chip); in iproc_gpio_probe()
275 dev_err(dev, "unable to add GPIO chip\n"); in iproc_gpio_probe()
286 if (chip->intr) { in iproc_gpio_remove()
289 val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK); in iproc_gpio_remove()
291 writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK); in iproc_gpio_remove()
298 { .compatible = "brcm,iproc-gpio-cca" },
305 .name = "iproc-xgs-gpio",
314 MODULE_DESCRIPTION("XGS IPROC GPIO driver");