1 // SPDX-License-Identifier: GPL-2.0-or-later
3  *  SYSCON GPIO driver
9 #include <linux/gpio/driver.h>
21 /* SYSCON driver is designed to use 32-bit wide registers */
26  * struct syscon_gpio_data - Configuration for the device.
33  * @dat_bit_offset:	Offset (in bits) to the first GPIO bit.
35  *			GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
63 	offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;  in syscon_gpio_get()
65 	ret = regmap_read(priv->syscon,  in syscon_gpio_get()
78 	offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;  in syscon_gpio_set()
80 	regmap_update_bits(priv->syscon,  in syscon_gpio_set()
90 	if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {  in syscon_gpio_dir_in()
93 		offs = priv->dir_reg_offset +  in syscon_gpio_dir_in()
94 		       priv->data->dir_bit_offset + offset;  in syscon_gpio_dir_in()
96 		regmap_update_bits(priv->syscon,  in syscon_gpio_dir_in()
108 	if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {  in syscon_gpio_dir_out()
111 		offs = priv->dir_reg_offset +  in syscon_gpio_dir_out()
112 		       priv->data->dir_bit_offset + offset;  in syscon_gpio_dir_out()
114 		regmap_update_bits(priv->syscon,  in syscon_gpio_dir_out()
120 	chip->set(chip, offset, val);  in syscon_gpio_dir_out()
126 	/* ARM CLPS711X SYSFLG1 Bits 8-10 */
141 	offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;  in rockchip_gpio_set()
144 	ret = regmap_write(priv->syscon,  in rockchip_gpio_set()
148 		dev_err(chip->parent, "gpio write failed ret(%d)\n", ret);  in rockchip_gpio_set()
167 	offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;  in keystone_gpio_set()
173 			priv->syscon,  in keystone_gpio_set()
178 		dev_err(chip->parent, "gpio write failed ret(%d)\n", ret);  in keystone_gpio_set()
182 	/* ARM Keystone 2 */
191 		.compatible	= "cirrus,ep7209-mctrl-gpio",
195 		.compatible	= "ti,keystone-dsp-gpio",
199 		.compatible	= "rockchip,rk3328-grf-gpio",
208 	struct device *dev = &pdev->dev;  in syscon_gpio_probe()
210 	struct device_node *np = dev->of_node;  in syscon_gpio_probe()
215 		return -ENOMEM;  in syscon_gpio_probe()
217 	priv->data = of_device_get_match_data(dev);  in syscon_gpio_probe()
219 	priv->syscon = syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");  in syscon_gpio_probe()
220 	if (IS_ERR(priv->syscon) && np->parent)  in syscon_gpio_probe()
221 		priv->syscon = syscon_node_to_regmap(np->parent);  in syscon_gpio_probe()
222 	if (IS_ERR(priv->syscon))  in syscon_gpio_probe()
223 		return PTR_ERR(priv->syscon);  in syscon_gpio_probe()
225 	ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,  in syscon_gpio_probe()
226 					 &priv->dreg_offset);  in syscon_gpio_probe()
230 	priv->dreg_offset <<= 3;  in syscon_gpio_probe()
232 	ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,  in syscon_gpio_probe()
233 					 &priv->dir_reg_offset);  in syscon_gpio_probe()
237 	priv->dir_reg_offset <<= 3;  in syscon_gpio_probe()
239 	priv->chip.parent = dev;  in syscon_gpio_probe()
240 	priv->chip.owner = THIS_MODULE;  in syscon_gpio_probe()
241 	priv->chip.label = dev_name(dev);  in syscon_gpio_probe()
242 	priv->chip.base = -1;  in syscon_gpio_probe()
243 	priv->chip.ngpio = priv->data->bit_count;  in syscon_gpio_probe()
244 	priv->chip.get = syscon_gpio_get;  in syscon_gpio_probe()
245 	if (priv->data->flags & GPIO_SYSCON_FEAT_IN)  in syscon_gpio_probe()
246 		priv->chip.direction_input = syscon_gpio_dir_in;  in syscon_gpio_probe()
247 	if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) {  in syscon_gpio_probe()
248 		priv->chip.set = priv->data->set ? : syscon_gpio_set;  in syscon_gpio_probe()
249 		priv->chip.direction_output = syscon_gpio_dir_out;  in syscon_gpio_probe()
254 	return devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);  in syscon_gpio_probe()
259 		.name		= "gpio-syscon",
267 MODULE_DESCRIPTION("SYSCON GPIO driver");