1 // SPDX-License-Identifier: GPL-2.0-only
3  * STMicroelectronics ConneXt (STA2X11) GPIO driver
6  * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.
13 #include <linux/gpio/driver.h>
19 #include <linux/mfd/sta2x11-mfd.h>
43 	struct gpio_chip		gpio;  member
50  * gpio methods
53 static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)  in gsta_gpio_set()  argument
55 	struct gsta_gpio *chip = gpiochip_get_data(gpio);  in gsta_gpio_set()
56 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_gpio_set()
60 		writel(bit, &regs->dats);  in gsta_gpio_set()
62 		writel(bit, &regs->datc);  in gsta_gpio_set()
65 static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)  in gsta_gpio_get()  argument
67 	struct gsta_gpio *chip = gpiochip_get_data(gpio);  in gsta_gpio_get()
68 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_gpio_get()
71 	return !!(readl(&regs->dat) & bit);  in gsta_gpio_get()
74 static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,  in gsta_gpio_direction_output()  argument
77 	struct gsta_gpio *chip = gpiochip_get_data(gpio);  in gsta_gpio_direction_output()
78 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_gpio_direction_output()
81 	writel(bit, &regs->dirs);  in gsta_gpio_direction_output()
84 		writel(bit, &regs->dats);  in gsta_gpio_direction_output()
86 		writel(bit, &regs->datc);  in gsta_gpio_direction_output()
90 static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)  in gsta_gpio_direction_input()  argument
92 	struct gsta_gpio *chip = gpiochip_get_data(gpio);  in gsta_gpio_direction_input()
93 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_gpio_direction_input()
96 	writel(bit, &regs->dirc);  in gsta_gpio_direction_input()
100 static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)  in gsta_gpio_to_irq()  argument
102 	struct gsta_gpio *chip = gpiochip_get_data(gpio);  in gsta_gpio_to_irq()
103 	return chip->irq_base + offset;  in gsta_gpio_to_irq()
108 	struct gpio_chip *gpio = &chip->gpio;  in gsta_gpio_setup()  local
113 	 * ConneXt device to start from gpio 0: it's the main chipset  in gsta_gpio_setup()
118 	gpio->label = dev_name(chip->dev);  in gsta_gpio_setup()
119 	gpio->owner = THIS_MODULE;  in gsta_gpio_setup()
120 	gpio->direction_input = gsta_gpio_direction_input;  in gsta_gpio_setup()
121 	gpio->get = gsta_gpio_get;  in gsta_gpio_setup()
122 	gpio->direction_output = gsta_gpio_direction_output;  in gsta_gpio_setup()
123 	gpio->set = gsta_gpio_set;  in gsta_gpio_setup()
124 	gpio->dbg_show = NULL;  in gsta_gpio_setup()
125 	gpio->base = gpio_base;  in gsta_gpio_setup()
126 	gpio->ngpio = GSTA_NR_GPIO;  in gsta_gpio_setup()
127 	gpio->can_sleep = false;  in gsta_gpio_setup()
128 	gpio->to_irq = gsta_gpio_to_irq;  in gsta_gpio_setup()
131 	 * After the first device, turn to dynamic gpio numbers.  in gsta_gpio_setup()
135 		gpio_base = -1;  in gsta_gpio_setup()
140  * invoked on startup to configure gpio's according to platform data.
144 static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)  in gsta_set_config()  argument
146 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_set_config()
152 	pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);  in gsta_set_config()
154 	if (cfg == PINMUX_TYPE_NONE)  in gsta_set_config()
158 	spin_lock_irqsave(&chip->lock, flags);  in gsta_set_config()
159 	val = readl(&regs->afsela);  in gsta_set_config()
160 	if (cfg == PINMUX_TYPE_FUNCTION)  in gsta_set_config()
164 	writel(val | bit, &regs->afsela);  in gsta_set_config()
165 	if (cfg == PINMUX_TYPE_FUNCTION) {  in gsta_set_config()
166 		spin_unlock_irqrestore(&chip->lock, flags);  in gsta_set_config()
171 	switch (cfg) {  in gsta_set_config()
173 		writel(bit, &regs->dirs);  in gsta_set_config()
174 		writel(bit, &regs->datc);  in gsta_set_config()
177 		writel(bit, &regs->dirs);  in gsta_set_config()
178 		writel(bit, &regs->dats);  in gsta_set_config()
181 		writel(bit, &regs->dirc);  in gsta_set_config()
182 		val = readl(&regs->pdis) | bit;  in gsta_set_config()
183 		writel(val, &regs->pdis);  in gsta_set_config()
186 		writel(bit, &regs->dirc);  in gsta_set_config()
187 		val = readl(&regs->pdis) & ~bit;  in gsta_set_config()
188 		writel(val, &regs->pdis);  in gsta_set_config()
189 		writel(bit, &regs->dats);  in gsta_set_config()
192 		writel(bit, &regs->dirc);  in gsta_set_config()
193 		val = readl(&regs->pdis) & ~bit;  in gsta_set_config()
194 		writel(val, &regs->pdis);  in gsta_set_config()
195 		writel(bit, &regs->datc);  in gsta_set_config()
200 	spin_unlock_irqrestore(&chip->lock, flags);  in gsta_set_config()
202 		pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",  in gsta_set_config()
203 		       __func__, chip, nr, cfg);  in gsta_set_config()
213 	struct gsta_gpio *chip = gc->private;  in gsta_irq_disable()
214 	int nr = data->irq - chip->irq_base;  in gsta_irq_disable()
215 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_irq_disable()
220 	spin_lock_irqsave(&chip->lock, flags);  in gsta_irq_disable()
221 	if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) {  in gsta_irq_disable()
222 		val = readl(&regs->rimsc) & ~bit;  in gsta_irq_disable()
223 		writel(val, &regs->rimsc);  in gsta_irq_disable()
225 	if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) {  in gsta_irq_disable()
226 		val = readl(&regs->fimsc) & ~bit;  in gsta_irq_disable()
227 		writel(val, &regs->fimsc);  in gsta_irq_disable()
229 	spin_unlock_irqrestore(&chip->lock, flags);  in gsta_irq_disable()
236 	struct gsta_gpio *chip = gc->private;  in gsta_irq_enable()
237 	int nr = data->irq - chip->irq_base;  in gsta_irq_enable()
238 	struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];  in gsta_irq_enable()
244 	type = chip->irq_type[nr];  in gsta_irq_enable()
246 	spin_lock_irqsave(&chip->lock, flags);  in gsta_irq_enable()
247 	val = readl(&regs->rimsc);  in gsta_irq_enable()
249 		writel(val | bit, &regs->rimsc);  in gsta_irq_enable()
251 		writel(val & ~bit, &regs->rimsc);  in gsta_irq_enable()
252 	val = readl(&regs->rimsc);  in gsta_irq_enable()
254 		writel(val | bit, &regs->fimsc);  in gsta_irq_enable()
256 		writel(val & ~bit, &regs->fimsc);  in gsta_irq_enable()
257 	spin_unlock_irqrestore(&chip->lock, flags);  in gsta_irq_enable()
264 	struct gsta_gpio *chip = gc->private;  in gsta_irq_type()
265 	int nr = d->irq - chip->irq_base;  in gsta_irq_type()
270 		return -EINVAL;  in gsta_irq_type()
273 	chip->irq_type[nr] = type; /* used for enable/disable */  in gsta_irq_type()
288 		regs = chip->regs[i];  in gsta_gpio_handler()
289 		base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK;  in gsta_gpio_handler()
290 		while ((is = readl(&regs->is))) {  in gsta_gpio_handler()
294 			writel(1 << nr, &regs->ic);  in gsta_gpio_handler()
307 	gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1,  in gsta_alloc_irq_chip()
308 					 chip->irq_base,  in gsta_alloc_irq_chip()
309 					 chip->reg_base, handle_simple_irq);  in gsta_alloc_irq_chip()
311 		return -ENOMEM;  in gsta_alloc_irq_chip()
313 	gc->private = chip;  in gsta_alloc_irq_chip()
314 	ct = gc->chip_types;  in gsta_alloc_irq_chip()
316 	ct->chip.irq_set_type = gsta_irq_type;  in gsta_alloc_irq_chip()
317 	ct->chip.irq_disable = gsta_irq_disable;  in gsta_alloc_irq_chip()
318 	ct->chip.irq_enable = gsta_irq_enable;  in gsta_alloc_irq_chip()
321 	rv = devm_irq_setup_generic_chip(chip->dev, gc,  in gsta_alloc_irq_chip()
329 		struct irq_chip_type *ct = gc->chip_types;  in gsta_alloc_irq_chip()
332 			i = chip->irq_base + j;  in gsta_alloc_irq_chip()
333 			irq_set_chip_and_handler(i, &ct->chip, ct->handler);  in gsta_alloc_irq_chip()
337 		gc->irq_cnt = i - gc->irq_base;  in gsta_alloc_irq_chip()
351 	pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);  in gsta_probe()
352 	gpio_pdata = dev_get_platdata(&pdev->dev);  in gsta_probe()
355 		dev_err(&dev->dev, "no gpio config\n");  in gsta_probe()
356 	pr_debug("gpio config: %p\n", gpio_pdata);  in gsta_probe()
358 	chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL);  in gsta_probe()
360 		return -ENOMEM;  in gsta_probe()
361 	chip->dev = &dev->dev;  in gsta_probe()
362 	chip->reg_base = devm_platform_ioremap_resource(dev, 0);  in gsta_probe()
363 	if (IS_ERR(chip->reg_base))  in gsta_probe()
364 		return PTR_ERR(chip->reg_base);  in gsta_probe()
367 		chip->regs[i] = chip->reg_base + i * 4096;  in gsta_probe()
369 		writel(0, &chip->regs[i]->rimsc);  in gsta_probe()
370 		writel(0, &chip->regs[i]->fimsc);  in gsta_probe()
371 		writel(~0, &chip->regs[i]->ic);  in gsta_probe()
373 	spin_lock_init(&chip->lock);  in gsta_probe()
377 			gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);  in gsta_probe()
380 	err = devm_irq_alloc_descs(&dev->dev, -1, 384,  in gsta_probe()
383 		dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n",  in gsta_probe()
384 			 -err);  in gsta_probe()
387 	chip->irq_base = err;  in gsta_probe()
393 	err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler,  in gsta_probe()
396 		dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n",  in gsta_probe()
397 			-err);  in gsta_probe()
401 	return devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);  in gsta_probe()
406 		.name	= "sta2x11-gpio",