Lines Matching +full:cortex +full:- +full:m4
1 // SPDX-License-Identifier: GPL-2.0
59 u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
66 writel_relaxed(val, ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
72 writel_relaxed(BIT(pin), ic->base + reg); in lpc18xx_gpio_pin_ic_set()
77 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_mask()
80 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_mask()
83 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_mask()
87 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_mask()
90 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_mask()
97 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_unmask()
100 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_unmask()
103 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_unmask()
107 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_unmask()
110 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_unmask()
117 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_eoi()
120 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_eoi()
123 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_eoi()
126 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_eoi()
133 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_set_type()
135 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_set_type()
138 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); in lpc18xx_gpio_pin_ic_set_type()
139 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_set_type()
142 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); in lpc18xx_gpio_pin_ic_set_type()
143 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_set_type()
146 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, false); in lpc18xx_gpio_pin_ic_set_type()
149 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_set_type()
168 struct lpc18xx_gpio_pin_ic *ic = domain->host_data; in lpc18xx_gpio_pin_ic_domain_alloc()
173 return -EINVAL; in lpc18xx_gpio_pin_ic_domain_alloc()
175 hwirq = fwspec->param[0]; in lpc18xx_gpio_pin_ic_domain_alloc()
177 return -EINVAL; in lpc18xx_gpio_pin_ic_domain_alloc()
181 * into edge interrupts 32...39 on parent Cortex-M3/M4 NVIC in lpc18xx_gpio_pin_ic_domain_alloc()
183 parent_fwspec.fwnode = domain->parent->fwnode; in lpc18xx_gpio_pin_ic_domain_alloc()
206 struct device *dev = gc->gpio.parent; in lpc18xx_gpio_pin_ic_probe()
213 parent_node = of_irq_find_parent(dev->of_node); in lpc18xx_gpio_pin_ic_probe()
215 return -ENXIO; in lpc18xx_gpio_pin_ic_probe()
220 return -ENXIO; in lpc18xx_gpio_pin_ic_probe()
224 return -ENOMEM; in lpc18xx_gpio_pin_ic_probe()
226 index = of_property_match_string(dev->of_node, "reg-names", in lpc18xx_gpio_pin_ic_probe()
227 "gpio-pin-ic"); in lpc18xx_gpio_pin_ic_probe()
229 ret = -ENODEV; in lpc18xx_gpio_pin_ic_probe()
233 ret = of_address_to_resource(dev->of_node, index, &res); in lpc18xx_gpio_pin_ic_probe()
237 ic->base = devm_ioremap_resource(dev, &res); in lpc18xx_gpio_pin_ic_probe()
238 if (IS_ERR(ic->base)) { in lpc18xx_gpio_pin_ic_probe()
239 ret = PTR_ERR(ic->base); in lpc18xx_gpio_pin_ic_probe()
243 raw_spin_lock_init(&ic->lock); in lpc18xx_gpio_pin_ic_probe()
245 ic->domain = irq_domain_add_hierarchy(parent_domain, 0, in lpc18xx_gpio_pin_ic_probe()
247 dev->of_node, in lpc18xx_gpio_pin_ic_probe()
250 if (!ic->domain) { in lpc18xx_gpio_pin_ic_probe()
252 ret = -ENODEV; in lpc18xx_gpio_pin_ic_probe()
256 gc->pin_ic = ic; in lpc18xx_gpio_pin_ic_probe()
261 devm_iounmap(dev, ic->base); in lpc18xx_gpio_pin_ic_probe()
271 writeb(value ? 1 : 0, gc->base + offset); in lpc18xx_gpio_set()
277 return !!readb(gc->base + offset); in lpc18xx_gpio_get()
290 spin_lock_irqsave(&gc->lock, flags); in lpc18xx_gpio_direction()
291 dir = readl(gc->base + LPC18XX_REG_DIR(port)); in lpc18xx_gpio_direction()
296 writel(dir, gc->base + LPC18XX_REG_DIR(port)); in lpc18xx_gpio_direction()
297 spin_unlock_irqrestore(&gc->lock, flags); in lpc18xx_gpio_direction()
316 .label = "lpc18xx/43xx-gpio",
329 struct device *dev = &pdev->dev; in lpc18xx_gpio_probe()
335 return -ENOMEM; in lpc18xx_gpio_probe()
337 gc->gpio = lpc18xx_chip; in lpc18xx_gpio_probe()
340 index = of_property_match_string(dev->of_node, "reg-names", "gpio"); in lpc18xx_gpio_probe()
343 gc->base = devm_platform_ioremap_resource(pdev, 0); in lpc18xx_gpio_probe()
347 ret = of_address_to_resource(dev->of_node, index, &res); in lpc18xx_gpio_probe()
351 gc->base = devm_ioremap_resource(dev, &res); in lpc18xx_gpio_probe()
353 if (IS_ERR(gc->base)) in lpc18xx_gpio_probe()
354 return PTR_ERR(gc->base); in lpc18xx_gpio_probe()
356 gc->clk = devm_clk_get(dev, NULL); in lpc18xx_gpio_probe()
357 if (IS_ERR(gc->clk)) { in lpc18xx_gpio_probe()
359 return PTR_ERR(gc->clk); in lpc18xx_gpio_probe()
362 ret = clk_prepare_enable(gc->clk); in lpc18xx_gpio_probe()
368 spin_lock_init(&gc->lock); in lpc18xx_gpio_probe()
370 gc->gpio.parent = dev; in lpc18xx_gpio_probe()
372 ret = devm_gpiochip_add_data(dev, &gc->gpio, gc); in lpc18xx_gpio_probe()
375 clk_disable_unprepare(gc->clk); in lpc18xx_gpio_probe()
389 if (gc->pin_ic) in lpc18xx_gpio_remove()
390 irq_domain_remove(gc->pin_ic->domain); in lpc18xx_gpio_remove()
392 clk_disable_unprepare(gc->clk); in lpc18xx_gpio_remove()
398 { .compatible = "nxp,lpc1850-gpio" },
407 .name = "lpc18xx-gpio",