10 #include <linux/gpio/driver.h>
11 #include <linux/gpio/aspeed.h>
23  * These two headers aren't meant to be used by GPIO drivers. We need
28 #include <linux/gpio/consumer.h>
48  * represents disabled debouncing for the GPIO. Any other value for an element
83  *       line even when the GPIO is configured as an output. Since
208 static inline void __iomem *bank_reg(struct aspeed_gpio *gpio,  in bank_reg()  argument
214 		return gpio->base + bank->val_regs + GPIO_VAL_VALUE;  in bank_reg()
216 		return gpio->base + bank->rdata_reg;  in bank_reg()
218 		return gpio->base + bank->val_regs + GPIO_VAL_DIR;  in bank_reg()
220 		return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;  in bank_reg()
222 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;  in bank_reg()
224 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;  in bank_reg()
226 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;  in bank_reg()
228 		return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS;  in bank_reg()
230 		return gpio->base + bank->debounce_regs + GPIO_DEBOUNCE_SEL1;  in bank_reg()
232 		return gpio->base + bank->debounce_regs + GPIO_DEBOUNCE_SEL2;  in bank_reg()
234 		return gpio->base + bank->tolerance_regs;  in bank_reg()
236 		return gpio->base + bank->cmdsrc_regs + GPIO_CMDSRC_0;  in bank_reg()
238 		return gpio->base + bank->cmdsrc_regs + GPIO_CMDSRC_1;  in bank_reg()
265 		struct aspeed_gpio *gpio, unsigned int offset)  in find_bank_props()  argument
267 	const struct aspeed_bank_props *props = gpio->config->props;  in find_bank_props()
278 static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset)  in have_gpio()  argument
280 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_gpio()
288 static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset)  in have_input()  argument
290 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_input()
298 static inline bool have_output(struct aspeed_gpio *gpio, unsigned int offset)  in have_output()  argument
300 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_output()
305 static void aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio,  in aspeed_gpio_change_cmd_source()  argument
309 	void __iomem *c0 = bank_reg(gpio, bank, reg_cmdsrc0);  in aspeed_gpio_change_cmd_source()
310 	void __iomem *c1 = bank_reg(gpio, bank, reg_cmdsrc1);  in aspeed_gpio_change_cmd_source()
337 static bool aspeed_gpio_copro_request(struct aspeed_gpio *gpio,  in aspeed_gpio_copro_request()  argument
342 	if (!copro_ops || !gpio->cf_copro_bankmap)  in aspeed_gpio_copro_request()
344 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_request()
353 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3, GPIO_CMDSRC_ARM);  in aspeed_gpio_copro_request()
356 	gpio->dcache[GPIO_BANK(offset)] = ioread32(bank_reg(gpio, bank, reg_rdata));  in aspeed_gpio_copro_request()
361 static void aspeed_gpio_copro_release(struct aspeed_gpio *gpio,  in aspeed_gpio_copro_release()  argument
366 	if (!copro_ops || !gpio->cf_copro_bankmap)  in aspeed_gpio_copro_release()
368 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_release()
374 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3,  in aspeed_gpio_copro_release()
383 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_get()  local
386 	return !!(ioread32(bank_reg(gpio, bank, reg_val)) & GPIO_BIT(offset));  in aspeed_gpio_get()
392 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in __aspeed_gpio_set()  local
397 	addr = bank_reg(gpio, bank, reg_val);  in __aspeed_gpio_set()
398 	reg = gpio->dcache[GPIO_BANK(offset)];  in __aspeed_gpio_set()
404 	gpio->dcache[GPIO_BANK(offset)] = reg;  in __aspeed_gpio_set()
412 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_set()  local
416 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_set()
417 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set()
422 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set()
423 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_set()
428 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_dir_in()  local
430 	void __iomem *addr = bank_reg(gpio, bank, reg_dir);  in aspeed_gpio_dir_in()
435 	if (!have_input(gpio, offset))  in aspeed_gpio_dir_in()
438 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_dir_in()
443 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_in()
446 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_in()
448 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_dir_in()
456 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_dir_out()  local
458 	void __iomem *addr = bank_reg(gpio, bank, reg_dir);  in aspeed_gpio_dir_out()
463 	if (!have_output(gpio, offset))  in aspeed_gpio_dir_out()
466 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_dir_out()
471 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_out()
476 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_out()
477 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_dir_out()
484 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_get_direction()  local
489 	if (!have_input(gpio, offset))  in aspeed_gpio_get_direction()
492 	if (!have_output(gpio, offset))  in aspeed_gpio_get_direction()
495 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_get_direction()
497 	val = ioread32(bank_reg(gpio, bank, reg_dir)) & GPIO_BIT(offset);  in aspeed_gpio_get_direction()
499 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_get_direction()
505 					   struct aspeed_gpio **gpio,  in irqd_to_aspeed_gpio_data()  argument
519 	*gpio = internal;  in irqd_to_aspeed_gpio_data()
529 	struct aspeed_gpio *gpio;  in aspeed_gpio_irq_ack()  local
536 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_ack()
540 	status_addr = bank_reg(gpio, bank, reg_irq_status);  in aspeed_gpio_irq_ack()
542 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_irq_ack()
543 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_ack()
548 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_ack()
549 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_irq_ack()
555 	struct aspeed_gpio *gpio;  in aspeed_gpio_irq_set_mask()  local
562 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_set_mask()
566 	addr = bank_reg(gpio, bank, reg_irq_enable);  in aspeed_gpio_irq_set_mask()
568 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_irq_set_mask()
569 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_set_mask()
579 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_set_mask()
580 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_irq_set_mask()
601 	struct aspeed_gpio *gpio;  in aspeed_gpio_set_type()  local
607 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_set_type()
632 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_set_type()
633 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set_type()
635 	addr = bank_reg(gpio, bank, reg_irq_type0);  in aspeed_gpio_set_type()
640 	addr = bank_reg(gpio, bank, reg_irq_type1);  in aspeed_gpio_set_type()
645 	addr = bank_reg(gpio, bank, reg_irq_type2);  in aspeed_gpio_set_type()
651 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set_type()
652 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_set_type()
666 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_irq_handler()  local
670 	banks = DIV_ROUND_UP(gpio->chip.ngpio, 32);  in aspeed_gpio_irq_handler()
687 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_init_irq_valid_mask()  local
688 	const struct aspeed_bank_props *props = gpio->config->props;  in aspeed_init_irq_valid_mask()
694 		/* Pretty crummy approach, but similar to GPIO core */  in aspeed_init_irq_valid_mask()
698 			if (i >= gpio->chip.ngpio)  in aspeed_init_irq_valid_mask()
711 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_reset_tolerance()  local
717 	treg = bank_reg(gpio, to_bank(offset), reg_tolerance);  in aspeed_gpio_reset_tolerance()
719 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_reset_tolerance()
720 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_reset_tolerance()
732 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_reset_tolerance()
733 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_reset_tolerance()
751 static int usecs_to_cycles(struct aspeed_gpio *gpio, unsigned long usecs,  in usecs_to_cycles()  argument
758 	rate = clk_get_rate(gpio->clk);  in usecs_to_cycles()
774 /* Call under gpio->lock */
775 static int register_allocated_timer(struct aspeed_gpio *gpio,  in register_allocated_timer()  argument
778 	if (WARN(gpio->offset_timer[offset] != 0,  in register_allocated_timer()
780 				offset, gpio->offset_timer[offset]))  in register_allocated_timer()
783 	if (WARN(gpio->timer_users[timer] == UINT_MAX,  in register_allocated_timer()
787 	gpio->offset_timer[offset] = timer;  in register_allocated_timer()
788 	gpio->timer_users[timer]++;  in register_allocated_timer()
793 /* Call under gpio->lock */
794 static int unregister_allocated_timer(struct aspeed_gpio *gpio,  in unregister_allocated_timer()  argument
797 	if (WARN(gpio->offset_timer[offset] == 0,  in unregister_allocated_timer()
801 	if (WARN(gpio->timer_users[gpio->offset_timer[offset]] == 0,  in unregister_allocated_timer()
803 				gpio->offset_timer[offset]))  in unregister_allocated_timer()
806 	gpio->timer_users[gpio->offset_timer[offset]]--;  in unregister_allocated_timer()
807 	gpio->offset_timer[offset] = 0;  in unregister_allocated_timer()
812 /* Call under gpio->lock */
813 static inline bool timer_allocation_registered(struct aspeed_gpio *gpio,  in timer_allocation_registered()  argument
816 	return gpio->offset_timer[offset] > 0;  in timer_allocation_registered()
819 /* Call under gpio->lock */
820 static void configure_timer(struct aspeed_gpio *gpio, unsigned int offset,  in configure_timer()  argument
831 	addr = bank_reg(gpio, bank, reg_debounce_sel1);  in configure_timer()
835 	addr = bank_reg(gpio, bank, reg_debounce_sel2);  in configure_timer()
843 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in enable_debounce()  local
849 	if (!gpio->clk)  in enable_debounce()
852 	rc = usecs_to_cycles(gpio, usecs, &requested_cycles);  in enable_debounce()
855 				usecs, clk_get_rate(gpio->clk), rc);  in enable_debounce()
859 	raw_spin_lock_irqsave(&gpio->lock, flags);  in enable_debounce()
861 	if (timer_allocation_registered(gpio, offset)) {  in enable_debounce()
862 		rc = unregister_allocated_timer(gpio, offset);  in enable_debounce()
871 		cycles = ioread32(gpio->base + debounce_timers[i]);  in enable_debounce()
883 		for (j = 1; j < ARRAY_SIZE(gpio->timer_users); j++) {  in enable_debounce()
884 			if (gpio->timer_users[j] == 0)  in enable_debounce()
888 		if (j == ARRAY_SIZE(gpio->timer_users)) {  in enable_debounce()
901 			configure_timer(gpio, offset, 0);  in enable_debounce()
907 		iowrite32(requested_cycles, gpio->base + debounce_timers[i]);  in enable_debounce()
915 	register_allocated_timer(gpio, offset, i);  in enable_debounce()
916 	configure_timer(gpio, offset, i);  in enable_debounce()
919 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in enable_debounce()
926 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in disable_debounce()  local
930 	raw_spin_lock_irqsave(&gpio->lock, flags);  in disable_debounce()
932 	rc = unregister_allocated_timer(gpio, offset);  in disable_debounce()
934 		configure_timer(gpio, offset, 0);  in disable_debounce()
936 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in disable_debounce()
944 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in set_debounce()  local
946 	if (!have_debounce(gpio, offset))  in set_debounce()
979  *                             the coprocessor for shared GPIO banks
993  * aspeed_gpio_copro_grab_gpio - Mark a GPIO used by the coprocessor. The entire
996  * @desc: The GPIO to be marked
997  * @vreg_offset: If non-NULL, returns the value register offset in the GPIO space
998  * @dreg_offset: If non-NULL, returns the data latch register offset in the GPIO space
999  * @bit: If non-NULL, returns the bit number of the GPIO in the registers
1005 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_copro_grab_gpio()  local
1010 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_grab_gpio()
1011 		gpio->cf_copro_bankmap = kzalloc(gpio->chip.ngpio >> 3, GFP_KERNEL);  in aspeed_gpio_copro_grab_gpio()
1012 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_grab_gpio()
1014 	if (offset < 0 || offset > gpio->chip.ngpio)  in aspeed_gpio_copro_grab_gpio()
1018 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_copro_grab_gpio()
1021 	if (gpio->cf_copro_bankmap[bindex] == 0xff) {  in aspeed_gpio_copro_grab_gpio()
1025 	gpio->cf_copro_bankmap[bindex]++;  in aspeed_gpio_copro_grab_gpio()
1028 	if (gpio->cf_copro_bankmap[bindex] == 1)  in aspeed_gpio_copro_grab_gpio()
1029 		aspeed_gpio_change_cmd_source(gpio, bank, bindex,  in aspeed_gpio_copro_grab_gpio()
1039 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_copro_grab_gpio()
1045  * aspeed_gpio_copro_release_gpio - Unmark a GPIO used by the coprocessor.
1046  * @desc: The GPIO to be marked
1051 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_copro_release_gpio()  local
1056 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_release_gpio()
1059 	if (offset < 0 || offset > gpio->chip.ngpio)  in aspeed_gpio_copro_release_gpio()
1063 	raw_spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_copro_release_gpio()
1066 	if (gpio->cf_copro_bankmap[bindex] == 0) {  in aspeed_gpio_copro_release_gpio()
1070 	gpio->cf_copro_bankmap[bindex]--;  in aspeed_gpio_copro_release_gpio()
1073 	if (gpio->cf_copro_bankmap[bindex] == 0)  in aspeed_gpio_copro_release_gpio()
1074 		aspeed_gpio_change_cmd_source(gpio, bank, bindex,  in aspeed_gpio_copro_release_gpio()
1077 	raw_spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_copro_release_gpio()
1092 	{ 6, 0x0000000f, 0x0fffff0f }, /* Y/Z/AA/AB, two 4-GPIO holes */
1097 	/* 220 for simplicity, really 216 with two 4-GPIO holes, four at end */
1103 	{ 6, 0x0fffffff, 0x0fffffff }, /* Y/Z/AA/AB, 4-GPIO hole */
1109 	/* 232 for simplicity, actual number is 228 (4-GPIO hole in GPIOAB) */
1129 	{ .compatible = "aspeed,ast2400-gpio", .data = &ast2400_config, },
1130 	{ .compatible = "aspeed,ast2500-gpio", .data = &ast2500_config, },
1131 	{ .compatible = "aspeed,ast2600-gpio", .data = &ast2600_config, },
1139 	struct aspeed_gpio *gpio;  in aspeed_gpio_probe()  local
1143 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);  in aspeed_gpio_probe()
1144 	if (!gpio)  in aspeed_gpio_probe()
1147 	gpio->base = devm_platform_ioremap_resource(pdev, 0);  in aspeed_gpio_probe()
1148 	if (IS_ERR(gpio->base))  in aspeed_gpio_probe()
1149 		return PTR_ERR(gpio->base);  in aspeed_gpio_probe()
1151 	raw_spin_lock_init(&gpio->lock);  in aspeed_gpio_probe()
1157 	gpio->clk = of_clk_get(pdev->dev.of_node, 0);  in aspeed_gpio_probe()
1158 	if (IS_ERR(gpio->clk)) {  in aspeed_gpio_probe()
1161 		gpio->clk = NULL;  in aspeed_gpio_probe()
1164 	gpio->config = gpio_id->data;  in aspeed_gpio_probe()
1166 	gpio->chip.parent = &pdev->dev;  in aspeed_gpio_probe()
1168 	gpio->chip.ngpio = (u16) ngpio;  in aspeed_gpio_probe()
1170 		gpio->chip.ngpio = gpio->config->nr_gpios;  in aspeed_gpio_probe()
1171 	gpio->chip.direction_input = aspeed_gpio_dir_in;  in aspeed_gpio_probe()
1172 	gpio->chip.direction_output = aspeed_gpio_dir_out;  in aspeed_gpio_probe()
1173 	gpio->chip.get_direction = aspeed_gpio_get_direction;  in aspeed_gpio_probe()
1174 	gpio->chip.request = aspeed_gpio_request;  in aspeed_gpio_probe()
1175 	gpio->chip.free = aspeed_gpio_free;  in aspeed_gpio_probe()
1176 	gpio->chip.get = aspeed_gpio_get;  in aspeed_gpio_probe()
1177 	gpio->chip.set = aspeed_gpio_set;  in aspeed_gpio_probe()
1178 	gpio->chip.set_config = aspeed_gpio_set_config;  in aspeed_gpio_probe()
1179 	gpio->chip.label = dev_name(&pdev->dev);  in aspeed_gpio_probe()
1180 	gpio->chip.base = -1;  in aspeed_gpio_probe()
1183 	banks = DIV_ROUND_UP(gpio->chip.ngpio, 32);  in aspeed_gpio_probe()
1184 	gpio->dcache = devm_kcalloc(&pdev->dev,  in aspeed_gpio_probe()
1186 	if (!gpio->dcache)  in aspeed_gpio_probe()
1195 		void __iomem *addr = bank_reg(gpio, bank, reg_rdata);  in aspeed_gpio_probe()
1196 		gpio->dcache[i] = ioread32(addr);  in aspeed_gpio_probe()
1197 		aspeed_gpio_change_cmd_source(gpio, bank, 0, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1198 		aspeed_gpio_change_cmd_source(gpio, bank, 1, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1199 		aspeed_gpio_change_cmd_source(gpio, bank, 2, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1200 		aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1208 		gpio->irq = rc;  in aspeed_gpio_probe()
1209 		girq = &gpio->chip.irq;  in aspeed_gpio_probe()
1210 		girq->chip = &gpio->irqc;  in aspeed_gpio_probe()
1223 		girq->parents[0] = gpio->irq;  in aspeed_gpio_probe()
1229 	gpio->offset_timer =  in aspeed_gpio_probe()
1230 		devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL);  in aspeed_gpio_probe()
1231 	if (!gpio->offset_timer)  in aspeed_gpio_probe()
1234 	rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);  in aspeed_gpio_probe()
1250 MODULE_DESCRIPTION("Aspeed GPIO Driver");