1 // SPDX-License-Identifier: GPL-2.0
3  * FPGA Manager Driver for Intel Stratix10 SoC
8 #include <linux/fpga/fpga-mgr.h>
9 #include <linux/firmware/intel/stratix10-svc-client.h>
15  * FPGA programming requires a higher level of privilege (EL3), per the SoC
49 	struct stratix10_svc_chan *chan = priv->chan;  in s10_svc_send_msg()
50 	struct device *dev = priv->client.dev;  in s10_svc_send_msg()
73 	struct s10_priv *priv = mgr->priv;  in s10_free_buffers()
78 		if (!priv->svc_bufs[i].buf) {  in s10_free_buffers()
84 					   &priv->svc_bufs[i].lock)) {  in s10_free_buffers()
85 			stratix10_svc_free_memory(priv->chan,  in s10_free_buffers()
86 						  priv->svc_bufs[i].buf);  in s10_free_buffers()
87 			priv->svc_bufs[i].buf = NULL;  in s10_free_buffers()
100 	struct s10_priv *priv = mgr->priv;  in s10_free_buffer_count()
105 		if (!priv->svc_bufs[i].buf)  in s10_free_buffer_count()
127 		if (priv->svc_bufs[i].buf == kaddr) {  in s10_unlock_bufs()
129 					 &priv->svc_bufs[i].lock);  in s10_unlock_bufs()
133 	WARN(1, "Unknown buffer returned from service layer %p\n", kaddr);  in s10_unlock_bufs()
137  * s10_receive_callback - callback for service layer to use to provide client
145 	struct s10_priv *priv = client->priv;  in s10_receive_callback()
151 	status = data->status;  in s10_receive_callback()
155 	 * test_and_clear_bit() to check status in priv->status  in s10_receive_callback()
159 			set_bit(i, &priv->status);  in s10_receive_callback()
162 		s10_unlock_bufs(priv, data->kaddr1);  in s10_receive_callback()
163 		s10_unlock_bufs(priv, data->kaddr2);  in s10_receive_callback()
164 		s10_unlock_bufs(priv, data->kaddr3);  in s10_receive_callback()
167 	complete(&priv->status_return_completion);  in s10_receive_callback()
171  * s10_ops_write_init - prepare for FPGA reconfiguration by requesting
178 	struct s10_priv *priv = mgr->priv;  in s10_ops_write_init()
179 	struct device *dev = priv->client.dev;  in s10_ops_write_init()
186 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {  in s10_ops_write_init()
193 	reinit_completion(&priv->status_return_completion);  in s10_ops_write_init()
200 		&priv->status_return_completion, S10_RECONFIG_TIMEOUT);  in s10_ops_write_init()
203 		ret = -ETIMEDOUT;  in s10_ops_write_init()
208 	if (!test_and_clear_bit(SVC_STATUS_OK, &priv->status)) {  in s10_ops_write_init()
209 		ret = -ETIMEDOUT;  in s10_ops_write_init()
215 		kbuf = stratix10_svc_allocate_memory(priv->chan, SVC_BUF_SIZE);  in s10_ops_write_init()
218 			ret = -ENOMEM;  in s10_ops_write_init()
222 		priv->svc_bufs[i].buf = kbuf;  in s10_ops_write_init()
223 		priv->svc_bufs[i].lock = 0;  in s10_ops_write_init()
227 	stratix10_svc_done(priv->chan);  in s10_ops_write_init()
232  * s10_send_buf - send a buffer to the service layer queue
236  * Returns # of bytes transferred or -ENOBUFS if the all the buffers are in use
241 	struct s10_priv *priv = mgr->priv;  in s10_send_buf()
242 	struct device *dev = priv->client.dev;  in s10_send_buf()
251 					   &priv->svc_bufs[i].lock))  in s10_send_buf()
255 		return -ENOBUFS;  in s10_send_buf()
259 	svc_buf = priv->svc_bufs[i].buf;  in s10_send_buf()
266 		clear_bit_unlock(SVC_BUF_LOCK, &priv->svc_bufs[i].lock);  in s10_send_buf()
280 	struct s10_priv *priv = mgr->priv;  in s10_ops_write()
281 	struct device *dev = priv->client.dev;  in s10_ops_write()
291 		reinit_completion(&priv->status_return_completion);  in s10_ops_write()
298 			count -= sent;  in s10_ops_write()
316 		if (!priv->status)  in s10_ops_write()
318 				&priv->status_return_completion,  in s10_ops_write()
321 		if (test_and_clear_bit(SVC_STATUS_BUFFER_DONE, &priv->status) ||  in s10_ops_write()
323 				       &priv->status)) {  in s10_ops_write()
328 		if (test_and_clear_bit(SVC_STATUS_ERROR, &priv->status)) {  in s10_ops_write()
329 			dev_err(dev, "ERROR - giving up - SVC_STATUS_ERROR\n");  in s10_ops_write()
330 			ret = -EFAULT;  in s10_ops_write()
336 			ret = -ETIMEDOUT;  in s10_ops_write()
350 	struct s10_priv *priv = mgr->priv;  in s10_ops_write_complete()
351 	struct device *dev = priv->client.dev;  in s10_ops_write_complete()
355 	timeout = usecs_to_jiffies(info->config_complete_timeout_us);  in s10_ops_write_complete()
358 		reinit_completion(&priv->status_return_completion);  in s10_ops_write_complete()
365 			&priv->status_return_completion, timeout);  in s10_ops_write_complete()
369 			ret = -ETIMEDOUT;  in s10_ops_write_complete()
376 		if (test_and_clear_bit(SVC_STATUS_COMPLETED, &priv->status))  in s10_ops_write_complete()
379 		if (test_and_clear_bit(SVC_STATUS_ERROR, &priv->status)) {  in s10_ops_write_complete()
380 			dev_err(dev, "ERROR - giving up - SVC_STATUS_ERROR\n");  in s10_ops_write_complete()
381 			ret = -EFAULT;  in s10_ops_write_complete()
386 	stratix10_svc_done(priv->chan);  in s10_ops_write_complete()
399 	struct device *dev = &pdev->dev;  in s10_probe()
406 		return -ENOMEM;  in s10_probe()
408 	priv->client.dev = dev;  in s10_probe()
409 	priv->client.receive_cb = s10_receive_callback;  in s10_probe()
410 	priv->client.priv = priv;  in s10_probe()
412 	priv->chan = stratix10_svc_request_channel_byname(&priv->client,  in s10_probe()
414 	if (IS_ERR(priv->chan)) {  in s10_probe()
417 		return PTR_ERR(priv->chan);  in s10_probe()
420 	init_completion(&priv->status_return_completion);  in s10_probe()
422 	mgr = fpga_mgr_register(dev, "Stratix10 SOC FPGA Manager",  in s10_probe()
434 	stratix10_svc_free_channel(priv->chan);  in s10_probe()
441 	struct s10_priv *priv = mgr->priv;  in s10_remove()
444 	stratix10_svc_free_channel(priv->chan);  in s10_remove()
450 	{.compatible = "intel,stratix10-soc-fpga-mgr"},
451 	{.compatible = "intel,agilex-soc-fpga-mgr"},
461 		.name	= "Stratix10 SoC FPGA manager",
474 		return -ENODEV;  in s10_init()
480 		return -ENODEV;  in s10_init()
501 MODULE_DESCRIPTION("Intel Stratix 10 SOC FPGA Manager");