Lines Matching full:configuration
211 * configuration of the device
652 * @valid_params: Bitfield defining validity of ring configuration parameters.
653 * The ring configuration fields are not valid, and will not be used for
654 * ring configuration, if their corresponding valid bit is zero.
755 * struct ti_sci_msg_udmap_rx_flow_cfg - UDMAP receive flow configuration
760 * @flow_index: UDMAP receive flow index for non-optional configuration.
764 * @rx_error_handling: UDMAP receive flow error handling configuration. Valid
820 * flow optional configuration
824 * @flow_index: UDMAP receive flow index for optional configuration.
856 * in the TISCI header via the RM board configuration resource assignment
861 * @valid_params: Bitfield defining validity of tx channel configuration
862 * parameters. The tx channel configuration fields are not valid, and will not
863 * be used for ch configuration, if their corresponding valid bit is zero.
887 * @tx_pause_on_err: UDMAP transmit channel pause on error configuration to
892 * configuration to be programmed into the tx_filt_einfo field of the
896 * configuration to be programmed into the tx_filt_pswords field of the
900 * interpretation configuration to be programmed into the tx_atype field of
904 * passing mechanism configuration to be programmed into the tx_chan_type
908 * configuration to be programmed into the tx_supr_tdpkt field of the channel's
912 * fetch configuration to be programmed into the tx_fetch_size field of the
917 * configuration to be programmed into the count field of the TCHAN_TCREDIT
920 * @txcq_qnum: UDMAP transmit channel completion queue configuration to be
923 * requesting configuration of the transmit channel.
934 * @fdepth: UDMAP transmit channel FIFO depth configuration to be programmed
940 * configuration to be programmed into the priority field of the channel's
943 * @tx_burst_size: UDMAP transmit channel burst size configuration to be
946 * @tx_tdtype: UDMAP transmit channel teardown type configuration to be
984 * in the TISCI header via the RM board configuration resource assignment
989 * @valid_params: Bitfield defining validity of rx channel configuration
991 * The rx channel configuration fields are not valid, and will not be used for
992 * ch configuration, if their corresponding valid bit is zero.
1014 * fetch configuration to be programmed into the rx_fetch_size field of the
1017 * @rxcq_qnum: UDMAP receive channel completion queue configuration to be
1020 * of the host, requesting configuration of the receive channel.
1032 * configuration to be programmed into the priority field of the channel's
1036 * configuration to program into the flow_start field of the RCHAN_RFLOW_RNG
1043 * host, requesting configuration of the receive channel.
1045 * @flowid_cnt: UDMAP receive channel additional flows count configuration to
1054 * subordinate of the host, requesting configuration of the receive channel.
1056 * @rx_pause_on_err: UDMAP receive channel pause on error configuration to be
1061 * interpretation configuration to be programmed into the rx_atype field of the
1065 * mechanism configuration to be programmed into the rx_chan_type field of the
1068 * @rx_ignore_short: UDMAP receive channel short packet treatment configuration
1071 * @rx_ignore_long: UDMAP receive channel long packet treatment configuration to
1074 * @rx_burst_size: UDMAP receive channel burst size configuration to be
1102 * Configuration does not include the flow registers which handle size-based
1106 * the RM board configuration resource assignment range list.
1111 * Bitfield defining validity of rx flow configuration parameters. The
1112 * rx flow configuration fields are not valid, and will not be used for flow
1113 * configuration, if their corresponding valid bit is zero. Valid bit usage:
1137 * @flow_index: UDMAP receive flow index for non-optional configuration.
1140 * UDMAP receive flow extended packet info present configuration to be
1144 * UDMAP receive flow PS words present configuration to be programmed into the
1148 * UDMAP receive flow error handling configuration to be programmed into the
1152 * UDMAP receive flow descriptor type configuration to be programmed into the
1156 * UDMAP receive flow start of packet offset configuration to be programmed
1162 * UDMAP receive flow destination queue configuration to be programmed into the
1166 * configuration of the receive flow.
1169 * UDMAP receive flow source tag high byte constant configuration to be
1174 * UDMAP receive flow source tag low byte constant configuration to be
1179 * UDMAP receive flow destination tag high byte constant configuration to be
1184 * UDMAP receive flow destination tag low byte constant configuration to be
1189 * UDMAP receive flow source tag high byte selector configuration to be
1194 * UDMAP receive flow source tag low byte selector configuration to be
1199 * UDMAP receive flow destination tag high byte selector configuration to be
1204 * UDMAP receive flow destination tag low byte selector configuration to be
1209 * UDMAP receive flow free descriptor queue 0 configuration to be programmed
1214 * configuration of the receive flow.
1217 * UDMAP receive flow free descriptor queue 1 configuration to be programmed
1222 * configuration of the receive flow.
1225 * UDMAP receive flow free descriptor queue 2 configuration to be programmed
1230 * configuration of the receive flow.
1233 * UDMAP receive flow free descriptor queue 3 configuration to be programmed
1238 * configuration of the receive flow.
1241 * UDMAP receive flow PS words location configuration to be programmed into the
1317 * struct ti_sci_msg_req_set_config - Set Processor boot configuration