Lines Matching refs:ARM_SMCCC_OWNER_SIP

155 			   (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT),  in __get_convention()
157 .owner = ARM_SMCCC_OWNER_SIP, in __get_convention()
264 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_is_call_available()
273 (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT); in __qcom_scm_is_call_available()
296 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_boot_addr()
316 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_boot_addr_mc()
377 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_cpu_power_down()
392 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_remote_state()
410 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_set_dload_mode()
468 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_init_image()
549 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_mem_setup()
584 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_auth_and_reset()
618 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_shutdown()
654 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_supported()
676 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_pas_mss_reset()
716 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_io_readl()
738 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_io_writel()
766 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_restore_sec_cfg()
784 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_secure_ptbl_size()
808 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_secure_ptbl_init()
830 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_set_cp_pool_size()
851 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_mem_protect_video_var()
879 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_assign_mem()
1061 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_ice_invalidate_key()
1102 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_ice_set_key()
1183 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_hdcp_req()
1212 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_set_pt_format()
1227 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_qsmmu500_wait_safe_toggle()
1248 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_lmh_profile_change()
1271 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_lmh_dcvsh()