1023 	void __iomem		*dev_csr;  member
1061 	l3cesr = readl(ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1070 	l3celr = readl(ctx->dev_csr + L3C_ELR);  in xgene_edac_l3_check()
1071 	l3caelr = readl(ctx->dev_csr + L3C_AELR);  in xgene_edac_l3_check()
1072 	l3cbelr = readl(ctx->dev_csr + L3C_BELR);  in xgene_edac_l3_check()
1100 	writel(0, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1119 	val = readl(ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1128 	writel(val, ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1154 	writel(0xFFFFFFFF, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_inject_ctrl_write()
1189 	void __iomem *dev_csr;  in xgene_edac_l3_add()  local
1201 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_l3_add()
1202 	if (IS_ERR(dev_csr)) {  in xgene_edac_l3_add()
1205 		rc = PTR_ERR(dev_csr);  in xgene_edac_l3_add()
1219 	ctx->dev_csr = dev_csr;  in xgene_edac_l3_add()
1397 	reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1409 	info = readl(ctx->dev_csr + XGICTRANSERRREQINFO);  in xgene_edac_iob_gic_report()
1413 	writel(reg, ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1417 	reg = readl(ctx->dev_csr + GLBL_ERR_STS);  in xgene_edac_iob_gic_report()
1421 		err_addr_lo = readl(ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1422 		err_addr_hi = readl(ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1426 		writel(err_addr_lo, ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1427 		writel(err_addr_hi, ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1430 		err_addr_lo = readl(ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1431 		err_addr_hi = readl(ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1435 		writel(err_addr_lo, ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1436 		writel(err_addr_hi, ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1442 		err_addr_lo = readl(ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1443 		err_addr_hi = readl(ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1447 		writel(err_addr_lo, ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1448 		writel(err_addr_hi, ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1451 		err_addr_lo = readl(ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1452 		err_addr_hi = readl(ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1456 		writel(err_addr_lo, ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1457 		writel(err_addr_hi, ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1514 	reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1561 	err_addr_lo = readl(ctx->dev_csr + IOBBATRANSERRREQINFOL);  in xgene_edac_rb_report()
1562 	err_addr_hi = readl(ctx->dev_csr + IOBBATRANSERRREQINFOH);  in xgene_edac_rb_report()
1568 			readl(ctx->dev_csr + IOBBATRANSERRCSWREQID));  in xgene_edac_rb_report()
1569 	writel(reg, ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1580 	reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1603 	writel(reg, ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1607 	reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1610 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOL);  in xgene_edac_pa_report()
1611 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOH);  in xgene_edac_pa_report()
1617 	writel(reg, ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1621 	reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1624 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOL);  in xgene_edac_pa_report()
1625 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOH);  in xgene_edac_pa_report()
1631 	writel(reg, ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1712 		       ctx->dev_csr + IOBAXIS0TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1714 		       ctx->dev_csr + IOBAXIS1TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1716 		       ctx->dev_csr + XGICTRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1728 	void __iomem *dev_csr;  in xgene_edac_soc_add()  local
1741 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_soc_add()
1742 	if (IS_ERR(dev_csr)) {  in xgene_edac_soc_add()
1745 		rc = PTR_ERR(dev_csr);  in xgene_edac_soc_add()
1759 	ctx->dev_csr = dev_csr;  in xgene_edac_soc_add()