Lines Matching refs:res_cfg
73 #define IBECC_BASE (res_cfg->ibecc_base)
78 #define ECC_ERROR_LOG_OFFSET (IBECC_BASE + res_cfg->ibecc_error_log_offset)
92 #define IMC_BASE (res_cfg->imc_base)
140 } *res_cfg; variable
650 for (i = 0; i < res_cfg->num_imc; i++) { in ecclog_handler()
685 res.sys_addr = res_cfg->err_addr_to_sys_addr(eaddr, res.mc); in ecclog_work_cb()
686 res.imc_addr = res_cfg->err_addr_to_imc_addr(eaddr, res.mc); in ecclog_work_cb()
705 for (i = 0; i < res_cfg->num_imc; i++) in ecclog_irq_work_cb()
948 if (!res_cfg->ibecc_available(pdev)) { in igen6_pci_setup()
1094 for (i = 0; i < res_cfg->num_imc; i++) { in igen6_unregister_mcis()
1110 u64 base = mchbar + res_cfg->cmf_base; in igen6_mem_slice_setup()
1111 u32 offset = res_cfg->ms_hash_offset; in igen6_mem_slice_setup()
1112 u32 size = res_cfg->cmf_size; in igen6_mem_slice_setup()
1156 if (res_cfg->machine_check) { in register_err_handler()
1173 if (res_cfg->machine_check) { in unregister_err_handler()
1192 res_cfg = (struct res_config *)ent->driver_data; in igen6_probe()
1198 for (i = 0; i < res_cfg->num_imc; i++) { in igen6_probe()
1204 if (res_cfg->num_imc > 1) { in igen6_probe()