Lines Matching +full:chan +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
19 static struct txx9dmac_chan *to_txx9dmac_chan(struct dma_chan *chan) in to_txx9dmac_chan() argument
21 return container_of(chan, struct txx9dmac_chan, chan); in to_txx9dmac_chan()
26 return dc->ch_regs; in __dma_regs()
32 return dc->ch_regs; in __dma_regs32()
35 #define channel64_readq(dc, name) \ argument
36 __raw_readq(&(__dma_regs(dc)->name))
37 #define channel64_writeq(dc, name, val) \ argument
38 __raw_writeq((val), &(__dma_regs(dc)->name))
39 #define channel64_readl(dc, name) \ argument
40 __raw_readl(&(__dma_regs(dc)->name))
41 #define channel64_writel(dc, name, val) \ argument
42 __raw_writel((val), &(__dma_regs(dc)->name))
44 #define channel32_readl(dc, name) \ argument
45 __raw_readl(&(__dma_regs32(dc)->name))
46 #define channel32_writel(dc, name, val) \ argument
47 __raw_writel((val), &(__dma_regs32(dc)->name))
49 #define channel_readq(dc, name) channel64_readq(dc, name) argument
50 #define channel_writeq(dc, name, val) channel64_writeq(dc, name, val) argument
51 #define channel_readl(dc, name) \ argument
53 channel64_readl(dc, name) : channel32_readl(dc, name))
54 #define channel_writel(dc, name, val) \ argument
56 channel64_writel(dc, name, val) : channel32_writel(dc, name, val))
60 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_read_CHAR()
68 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_write_CHAR()
103 return ddev->regs; in __txx9dmac_regs()
109 return ddev->regs; in __txx9dmac_regs32()
112 #define dma64_readl(ddev, name) \ argument
113 __raw_readl(&(__txx9dmac_regs(ddev)->name))
114 #define dma64_writel(ddev, name, val) \ argument
115 __raw_writel((val), &(__txx9dmac_regs(ddev)->name))
117 #define dma32_readl(ddev, name) \ argument
118 __raw_readl(&(__txx9dmac_regs32(ddev)->name))
119 #define dma32_writel(ddev, name, val) \ argument
120 __raw_writel((val), &(__txx9dmac_regs32(ddev)->name))
122 #define dma_readl(ddev, name) \ argument
124 dma64_readl(ddev, name) : dma32_readl(ddev, name))
125 #define dma_writel(ddev, name, val) \ argument
127 dma64_writel(ddev, name, val) : dma32_writel(ddev, name, val))
129 static struct device *chan2dev(struct dma_chan *chan) in chan2dev() argument
131 return &chan->dev->device; in chan2dev()
133 static struct device *chan2parent(struct dma_chan *chan) in chan2parent() argument
135 return chan->dev->device.parent; in chan2parent()
147 return is_dmac64(dc) ? desc->hwdesc.CHAR : desc->hwdesc32.CHAR; in desc_read_CHAR()
154 desc->hwdesc.CHAR = val; in desc_write_CHAR()
156 desc->hwdesc32.CHAR = val; in desc_write_CHAR()
165 return list_entry(dc->active_list.next, in txx9dmac_first_active()
171 return list_entry(dc->active_list.prev, in txx9dmac_last_active()
177 return list_entry(dc->queue.next, struct txx9dmac_desc, desc_node); in txx9dmac_first_queued()
182 if (!list_empty(&desc->tx_list)) in txx9dmac_last_child()
183 desc = list_entry(desc->tx_list.prev, typeof(*desc), desc_node); in txx9dmac_last_child()
192 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_desc_alloc()
198 INIT_LIST_HEAD(&desc->tx_list); in txx9dmac_desc_alloc()
199 dma_async_tx_descriptor_init(&desc->txd, &dc->chan); in txx9dmac_desc_alloc()
200 desc->txd.tx_submit = txx9dmac_tx_submit; in txx9dmac_desc_alloc()
202 desc->txd.flags = DMA_CTRL_ACK; in txx9dmac_desc_alloc()
203 desc->txd.phys = dma_map_single(chan2parent(&dc->chan), &desc->hwdesc, in txx9dmac_desc_alloc()
204 ddev->descsize, DMA_TO_DEVICE); in txx9dmac_desc_alloc()
214 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
215 list_for_each_entry_safe(desc, _desc, &dc->free_list, desc_node) { in txx9dmac_desc_get()
216 if (async_tx_test_ack(&desc->txd)) { in txx9dmac_desc_get()
217 list_del(&desc->desc_node); in txx9dmac_desc_get()
221 dev_dbg(chan2dev(&dc->chan), "desc %p not ACKed\n", desc); in txx9dmac_desc_get()
224 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
226 dev_vdbg(chan2dev(&dc->chan), "scanned %u descriptors on freelist\n", in txx9dmac_desc_get()
231 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
232 dc->descs_allocated++; in txx9dmac_desc_get()
233 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
235 dev_err(chan2dev(&dc->chan), in txx9dmac_desc_get()
244 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_sync_desc_for_cpu()
247 list_for_each_entry(child, &desc->tx_list, desc_node) in txx9dmac_sync_desc_for_cpu()
248 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
249 child->txd.phys, ddev->descsize, in txx9dmac_sync_desc_for_cpu()
251 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
252 desc->txd.phys, ddev->descsize, in txx9dmac_sync_desc_for_cpu()
268 spin_lock_bh(&dc->lock); in txx9dmac_desc_put()
269 list_for_each_entry(child, &desc->tx_list, desc_node) in txx9dmac_desc_put()
270 dev_vdbg(chan2dev(&dc->chan), in txx9dmac_desc_put()
273 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_desc_put()
274 dev_vdbg(chan2dev(&dc->chan), "moving desc %p to freelist\n", in txx9dmac_desc_put()
276 list_add(&desc->desc_node, &dc->free_list); in txx9dmac_desc_put()
277 spin_unlock_bh(&dc->lock); in txx9dmac_desc_put()
281 /*----------------------------------------------------------------------*/
286 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
298 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
329 /* Called with dc->lock held and bh disabled */
333 struct txx9dmac_slave *ds = dc->chan.private; in txx9dmac_dostart()
336 dev_vdbg(chan2dev(&dc->chan), "dostart %u %p\n", in txx9dmac_dostart()
337 first->txd.cookie, first); in txx9dmac_dostart()
340 dev_err(chan2dev(&dc->chan), in txx9dmac_dostart()
341 "BUG: Attempted to start non-idle channel\n"); in txx9dmac_dostart()
351 if (ds->tx_reg) { in txx9dmac_dostart()
352 sai = ds->reg_width; in txx9dmac_dostart()
356 dai = ds->reg_width; in txx9dmac_dostart()
364 /* All 64-bit DMAC supports SMPCHN */ in txx9dmac_dostart()
365 channel64_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
367 channel64_write_CHAR(dc, first->txd.phys); in txx9dmac_dostart()
372 if (ds->tx_reg) { in txx9dmac_dostart()
373 sai = ds->reg_width; in txx9dmac_dostart()
377 dai = ds->reg_width; in txx9dmac_dostart()
386 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
388 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
390 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
391 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
396 /*----------------------------------------------------------------------*/
403 struct dma_async_tx_descriptor *txd = &desc->txd; in txx9dmac_descriptor_complete()
405 dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n", in txx9dmac_descriptor_complete()
406 txd->cookie, desc); in txx9dmac_descriptor_complete()
412 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_descriptor_complete()
413 list_move(&desc->desc_node, &dc->free_list); in txx9dmac_descriptor_complete()
426 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_dequeue()
434 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_dequeue()
435 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_dequeue()
436 prev->txd.phys, ddev->descsize, in txx9dmac_dequeue()
440 list_move_tail(&desc->desc_node, list); in txx9dmac_dequeue()
441 /* Make chain-completion interrupt happen */ in txx9dmac_dequeue()
442 if ((desc->txd.flags & DMA_PREP_INTERRUPT) && in txx9dmac_dequeue()
445 } while (!list_empty(&dc->queue)); in txx9dmac_dequeue()
457 list_splice_init(&dc->active_list, &list); in txx9dmac_complete_all()
458 if (!list_empty(&dc->queue)) { in txx9dmac_complete_all()
459 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_complete_all()
472 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
476 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
480 desc->SAIR, desc->DAIR, desc->CCR, desc->CSR); in txx9dmac_dump_desc()
485 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
489 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
493 d->SAIR, d->DAIR, d->CCR, d->CSR); in txx9dmac_dump_desc()
509 dev_crit(chan2dev(&dc->chan), "Abnormal Chain Completion\n"); in txx9dmac_handle_error()
513 list_del_init(&bad_desc->desc_node); in txx9dmac_handle_error()
521 if (list_empty(&dc->active_list) && !list_empty(&dc->queue)) in txx9dmac_handle_error()
522 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_handle_error()
523 if (!list_empty(&dc->active_list)) in txx9dmac_handle_error()
526 dev_crit(chan2dev(&dc->chan), in txx9dmac_handle_error()
528 bad_desc->txd.cookie); in txx9dmac_handle_error()
529 txx9dmac_dump_desc(dc, &bad_desc->hwdesc); in txx9dmac_handle_error()
530 list_for_each_entry(child, &bad_desc->tx_list, desc_node) in txx9dmac_handle_error()
531 txx9dmac_dump_desc(dc, &child->hwdesc); in txx9dmac_handle_error()
561 dev_vdbg(chan2dev(&dc->chan), "scan_descriptors: char=%#llx\n", in txx9dmac_scan_descriptors()
564 list_for_each_entry_safe(desc, _desc, &dc->active_list, desc_node) { in txx9dmac_scan_descriptors()
572 list_for_each_entry(child, &desc->tx_list, desc_node) in txx9dmac_scan_descriptors()
592 dev_err(chan2dev(&dc->chan), in txx9dmac_scan_descriptors()
598 if (!list_empty(&dc->queue)) { in txx9dmac_scan_descriptors()
599 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_scan_descriptors()
612 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", csr); in txx9dmac_chan_tasklet()
614 spin_lock(&dc->lock); in txx9dmac_chan_tasklet()
618 spin_unlock(&dc->lock); in txx9dmac_chan_tasklet()
619 irq = dc->irq; in txx9dmac_chan_tasklet()
628 dev_vdbg(chan2dev(&dc->chan), "interrupt: status=%#x\n", in txx9dmac_chan_interrupt()
631 tasklet_schedule(&dc->tasklet); in txx9dmac_chan_interrupt()
652 dev_vdbg(ddev->chan[0]->dma.dev, "tasklet: mcr=%x\n", mcr); in txx9dmac_tasklet()
655 dc = ddev->chan[i]; in txx9dmac_tasklet()
657 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", in txx9dmac_tasklet()
659 spin_lock(&dc->lock); in txx9dmac_tasklet()
663 spin_unlock(&dc->lock); in txx9dmac_tasklet()
666 irq = ddev->irq; in txx9dmac_tasklet()
675 dev_vdbg(ddev->chan[0]->dma.dev, "interrupt: status=%#x\n", in txx9dmac_interrupt()
678 tasklet_schedule(&ddev->tasklet); in txx9dmac_interrupt()
688 /*----------------------------------------------------------------------*/
693 struct txx9dmac_chan *dc = to_txx9dmac_chan(tx->chan); in txx9dmac_tx_submit()
696 spin_lock_bh(&dc->lock); in txx9dmac_tx_submit()
699 dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u %p\n", in txx9dmac_tx_submit()
700 desc->txd.cookie, desc); in txx9dmac_tx_submit()
702 list_add_tail(&desc->desc_node, &dc->queue); in txx9dmac_tx_submit()
703 spin_unlock_bh(&dc->lock); in txx9dmac_tx_submit()
709 txx9dmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, in txx9dmac_prep_dma_memcpy() argument
712 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_dma_memcpy()
713 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_dma_memcpy()
720 dev_vdbg(chan2dev(chan), "prep_dma_memcpy d%#llx s%#llx l%#zx f%#lx\n", in txx9dmac_prep_dma_memcpy()
724 dev_dbg(chan2dev(chan), "prep_dma_memcpy: length is zero!\n"); in txx9dmac_prep_dma_memcpy()
731 xfer_count = min_t(size_t, len - offset, TXX9_DMA_MAX_COUNT); in txx9dmac_prep_dma_memcpy()
733 * Workaround for ERT-TX49H2-033, ERT-TX49H3-020, in txx9dmac_prep_dma_memcpy()
734 * ERT-TX49H4-016 (slightly conservative) in txx9dmac_prep_dma_memcpy()
740 xfer_count -= 0x20; in txx9dmac_prep_dma_memcpy()
745 xfer_count -= 0x20; in txx9dmac_prep_dma_memcpy()
755 desc->hwdesc.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
756 desc->hwdesc.DAR = dest + offset; in txx9dmac_prep_dma_memcpy()
757 desc->hwdesc.CNTR = xfer_count; in txx9dmac_prep_dma_memcpy()
759 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
761 desc->hwdesc32.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
762 desc->hwdesc32.DAR = dest + offset; in txx9dmac_prep_dma_memcpy()
763 desc->hwdesc32.CNTR = xfer_count; in txx9dmac_prep_dma_memcpy()
765 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
770 * the dc->queue list or dc->active_list after a in txx9dmac_prep_dma_memcpy()
778 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_dma_memcpy()
779 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
780 prev->txd.phys, ddev->descsize, in txx9dmac_prep_dma_memcpy()
782 list_add_tail(&desc->desc_node, &first->tx_list); in txx9dmac_prep_dma_memcpy()
792 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
793 prev->txd.phys, ddev->descsize, in txx9dmac_prep_dma_memcpy()
796 first->txd.flags = flags; in txx9dmac_prep_dma_memcpy()
797 first->len = len; in txx9dmac_prep_dma_memcpy()
799 return &first->txd; in txx9dmac_prep_dma_memcpy()
803 txx9dmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, in txx9dmac_prep_slave_sg() argument
807 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_slave_sg()
808 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_slave_sg()
809 struct txx9dmac_slave *ds = chan->private; in txx9dmac_prep_slave_sg()
815 dev_vdbg(chan2dev(chan), "prep_dma_slave\n"); in txx9dmac_prep_slave_sg()
817 BUG_ON(!ds || !ds->reg_width); in txx9dmac_prep_slave_sg()
818 if (ds->tx_reg) in txx9dmac_prep_slave_sg()
842 desc->hwdesc.SAR = mem; in txx9dmac_prep_slave_sg()
843 desc->hwdesc.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
845 desc->hwdesc.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
846 desc->hwdesc.DAR = mem; in txx9dmac_prep_slave_sg()
848 desc->hwdesc.CNTR = sg_dma_len(sg); in txx9dmac_prep_slave_sg()
851 desc->hwdesc32.SAR = mem; in txx9dmac_prep_slave_sg()
852 desc->hwdesc32.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
854 desc->hwdesc32.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
855 desc->hwdesc32.DAR = mem; in txx9dmac_prep_slave_sg()
857 desc->hwdesc32.CNTR = sg_dma_len(sg); in txx9dmac_prep_slave_sg()
860 sai = ds->reg_width; in txx9dmac_prep_slave_sg()
864 dai = ds->reg_width; in txx9dmac_prep_slave_sg()
867 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_slave_sg()
872 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_slave_sg()
873 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
874 prev->txd.phys, in txx9dmac_prep_slave_sg()
875 ddev->descsize, in txx9dmac_prep_slave_sg()
877 list_add_tail(&desc->desc_node, &first->tx_list); in txx9dmac_prep_slave_sg()
887 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
888 prev->txd.phys, ddev->descsize, in txx9dmac_prep_slave_sg()
891 first->txd.flags = flags; in txx9dmac_prep_slave_sg()
892 first->len = 0; in txx9dmac_prep_slave_sg()
894 return &first->txd; in txx9dmac_prep_slave_sg()
897 static int txx9dmac_terminate_all(struct dma_chan *chan) in txx9dmac_terminate_all() argument
899 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_terminate_all()
903 dev_vdbg(chan2dev(chan), "terminate_all\n"); in txx9dmac_terminate_all()
904 spin_lock_bh(&dc->lock); in txx9dmac_terminate_all()
909 list_splice_init(&dc->queue, &list); in txx9dmac_terminate_all()
910 list_splice_init(&dc->active_list, &list); in txx9dmac_terminate_all()
912 spin_unlock_bh(&dc->lock); in txx9dmac_terminate_all()
922 txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, in txx9dmac_tx_status() argument
925 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_tx_status()
928 ret = dma_cookie_status(chan, cookie, txstate); in txx9dmac_tx_status()
932 spin_lock_bh(&dc->lock); in txx9dmac_tx_status()
934 spin_unlock_bh(&dc->lock); in txx9dmac_tx_status()
936 return dma_cookie_status(chan, cookie, txstate); in txx9dmac_tx_status()
942 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_chain_dynamic()
949 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_chain_dynamic()
950 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_chain_dynamic()
951 prev->txd.phys, ddev->descsize, in txx9dmac_chain_dynamic()
954 channel_read_CHAR(dc) == prev->txd.phys) in txx9dmac_chain_dynamic()
956 channel_write_CHAR(dc, desc->txd.phys); in txx9dmac_chain_dynamic()
957 list_splice_tail(&list, &dc->active_list); in txx9dmac_chain_dynamic()
960 static void txx9dmac_issue_pending(struct dma_chan *chan) in txx9dmac_issue_pending() argument
962 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_issue_pending()
964 spin_lock_bh(&dc->lock); in txx9dmac_issue_pending()
966 if (!list_empty(&dc->active_list)) in txx9dmac_issue_pending()
968 if (!list_empty(&dc->queue)) { in txx9dmac_issue_pending()
969 if (list_empty(&dc->active_list)) { in txx9dmac_issue_pending()
970 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_issue_pending()
975 if (!(prev->txd.flags & DMA_PREP_INTERRUPT) || in txx9dmac_issue_pending()
981 spin_unlock_bh(&dc->lock); in txx9dmac_issue_pending()
984 static int txx9dmac_alloc_chan_resources(struct dma_chan *chan) in txx9dmac_alloc_chan_resources() argument
986 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_alloc_chan_resources()
987 struct txx9dmac_slave *ds = chan->private; in txx9dmac_alloc_chan_resources()
991 dev_vdbg(chan2dev(chan), "alloc_chan_resources\n"); in txx9dmac_alloc_chan_resources()
995 dev_dbg(chan2dev(chan), "DMA channel not idle?\n"); in txx9dmac_alloc_chan_resources()
996 return -EIO; in txx9dmac_alloc_chan_resources()
999 dma_cookie_init(chan); in txx9dmac_alloc_chan_resources()
1001 dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; in txx9dmac_alloc_chan_resources()
1003 if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN)) in txx9dmac_alloc_chan_resources()
1004 dc->ccr |= TXX9_DMA_CCR_INTENC; in txx9dmac_alloc_chan_resources()
1005 if (chan->device->device_prep_dma_memcpy) { in txx9dmac_alloc_chan_resources()
1007 return -EINVAL; in txx9dmac_alloc_chan_resources()
1008 dc->ccr |= TXX9_DMA_CCR_XFSZ_X8; in txx9dmac_alloc_chan_resources()
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) in txx9dmac_alloc_chan_resources()
1012 return -EINVAL; in txx9dmac_alloc_chan_resources()
1013 dc->ccr |= TXX9_DMA_CCR_EXTRQ | in txx9dmac_alloc_chan_resources()
1014 TXX9_DMA_CCR_XFSZ(__ffs(ds->reg_width)); in txx9dmac_alloc_chan_resources()
1018 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1019 i = dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1020 while (dc->descs_allocated < TXX9_DMA_INITIAL_DESC_COUNT) { in txx9dmac_alloc_chan_resources()
1021 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1025 dev_info(chan2dev(chan), in txx9dmac_alloc_chan_resources()
1027 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1032 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1033 i = ++dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1035 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1037 dev_dbg(chan2dev(chan), in txx9dmac_alloc_chan_resources()
1043 static void txx9dmac_free_chan_resources(struct dma_chan *chan) in txx9dmac_free_chan_resources() argument
1045 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_free_chan_resources()
1046 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_free_chan_resources()
1050 dev_dbg(chan2dev(chan), "free_chan_resources (descs allocated=%u)\n", in txx9dmac_free_chan_resources()
1051 dc->descs_allocated); in txx9dmac_free_chan_resources()
1054 BUG_ON(!list_empty(&dc->active_list)); in txx9dmac_free_chan_resources()
1055 BUG_ON(!list_empty(&dc->queue)); in txx9dmac_free_chan_resources()
1058 spin_lock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1059 list_splice_init(&dc->free_list, &list); in txx9dmac_free_chan_resources()
1060 dc->descs_allocated = 0; in txx9dmac_free_chan_resources()
1061 spin_unlock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1064 dev_vdbg(chan2dev(chan), " freeing descriptor %p\n", desc); in txx9dmac_free_chan_resources()
1065 dma_unmap_single(chan2parent(chan), desc->txd.phys, in txx9dmac_free_chan_resources()
1066 ddev->descsize, DMA_TO_DEVICE); in txx9dmac_free_chan_resources()
1070 dev_vdbg(chan2dev(chan), "free_chan_resources done\n"); in txx9dmac_free_chan_resources()
1073 /*----------------------------------------------------------------------*/
1083 dev_get_platdata(&pdev->dev); in txx9dmac_chan_probe()
1084 struct platform_device *dmac_dev = cpdata->dmac_dev; in txx9dmac_chan_probe()
1085 struct txx9dmac_platform_data *pdata = dev_get_platdata(&dmac_dev->dev); in txx9dmac_chan_probe()
1088 int ch = pdev->id % TXX9_DMA_MAX_NR_CHANNELS; in txx9dmac_chan_probe()
1091 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); in txx9dmac_chan_probe()
1093 return -ENOMEM; in txx9dmac_chan_probe()
1095 dc->dma.dev = &pdev->dev; in txx9dmac_chan_probe()
1096 dc->dma.device_alloc_chan_resources = txx9dmac_alloc_chan_resources; in txx9dmac_chan_probe()
1097 dc->dma.device_free_chan_resources = txx9dmac_free_chan_resources; in txx9dmac_chan_probe()
1098 dc->dma.device_terminate_all = txx9dmac_terminate_all; in txx9dmac_chan_probe()
1099 dc->dma.device_tx_status = txx9dmac_tx_status; in txx9dmac_chan_probe()
1100 dc->dma.device_issue_pending = txx9dmac_issue_pending; in txx9dmac_chan_probe()
1101 if (pdata && pdata->memcpy_chan == ch) { in txx9dmac_chan_probe()
1102 dc->dma.device_prep_dma_memcpy = txx9dmac_prep_dma_memcpy; in txx9dmac_chan_probe()
1103 dma_cap_set(DMA_MEMCPY, dc->dma.cap_mask); in txx9dmac_chan_probe()
1105 dc->dma.device_prep_slave_sg = txx9dmac_prep_slave_sg; in txx9dmac_chan_probe()
1106 dma_cap_set(DMA_SLAVE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1107 dma_cap_set(DMA_PRIVATE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1110 INIT_LIST_HEAD(&dc->dma.channels); in txx9dmac_chan_probe()
1111 dc->ddev = platform_get_drvdata(dmac_dev); in txx9dmac_chan_probe()
1112 if (dc->ddev->irq < 0) { in txx9dmac_chan_probe()
1116 tasklet_setup(&dc->tasklet, txx9dmac_chan_tasklet); in txx9dmac_chan_probe()
1117 dc->irq = irq; in txx9dmac_chan_probe()
1118 err = devm_request_irq(&pdev->dev, dc->irq, in txx9dmac_chan_probe()
1119 txx9dmac_chan_interrupt, 0, dev_name(&pdev->dev), dc); in txx9dmac_chan_probe()
1123 dc->irq = -1; in txx9dmac_chan_probe()
1124 dc->ddev->chan[ch] = dc; in txx9dmac_chan_probe()
1125 dc->chan.device = &dc->dma; in txx9dmac_chan_probe()
1126 list_add_tail(&dc->chan.device_node, &dc->chan.device->channels); in txx9dmac_chan_probe()
1127 dma_cookie_init(&dc->chan); in txx9dmac_chan_probe()
1130 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1132 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1133 spin_lock_init(&dc->lock); in txx9dmac_chan_probe()
1135 INIT_LIST_HEAD(&dc->active_list); in txx9dmac_chan_probe()
1136 INIT_LIST_HEAD(&dc->queue); in txx9dmac_chan_probe()
1137 INIT_LIST_HEAD(&dc->free_list); in txx9dmac_chan_probe()
1143 err = dma_async_device_register(&dc->dma); in txx9dmac_chan_probe()
1146 dev_dbg(&pdev->dev, "TXx9 DMA Channel (dma%d%s%s)\n", in txx9dmac_chan_probe()
1147 dc->dma.dev_id, in txx9dmac_chan_probe()
1148 dma_has_cap(DMA_MEMCPY, dc->dma.cap_mask) ? " memcpy" : "", in txx9dmac_chan_probe()
1149 dma_has_cap(DMA_SLAVE, dc->dma.cap_mask) ? " slave" : ""); in txx9dmac_chan_probe()
1159 dma_async_device_unregister(&dc->dma); in txx9dmac_chan_remove()
1160 if (dc->irq >= 0) { in txx9dmac_chan_remove()
1161 devm_free_irq(&pdev->dev, dc->irq, dc); in txx9dmac_chan_remove()
1162 tasklet_kill(&dc->tasklet); in txx9dmac_chan_remove()
1164 dc->ddev->chan[pdev->id % TXX9_DMA_MAX_NR_CHANNELS] = NULL; in txx9dmac_chan_remove()
1170 struct txx9dmac_platform_data *pdata = dev_get_platdata(&pdev->dev); in txx9dmac_probe()
1178 return -EINVAL; in txx9dmac_probe()
1180 ddev = devm_kzalloc(&pdev->dev, sizeof(*ddev), GFP_KERNEL); in txx9dmac_probe()
1182 return -ENOMEM; in txx9dmac_probe()
1184 if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), in txx9dmac_probe()
1185 dev_name(&pdev->dev))) in txx9dmac_probe()
1186 return -EBUSY; in txx9dmac_probe()
1188 ddev->regs = devm_ioremap(&pdev->dev, io->start, resource_size(io)); in txx9dmac_probe()
1189 if (!ddev->regs) in txx9dmac_probe()
1190 return -ENOMEM; in txx9dmac_probe()
1191 ddev->have_64bit_regs = pdata->have_64bit_regs; in txx9dmac_probe()
1193 ddev->descsize = sizeof(struct txx9dmac_hwdesc); in txx9dmac_probe()
1195 ddev->descsize = sizeof(struct txx9dmac_hwdesc32); in txx9dmac_probe()
1200 ddev->irq = platform_get_irq(pdev, 0); in txx9dmac_probe()
1201 if (ddev->irq >= 0) { in txx9dmac_probe()
1202 tasklet_setup(&ddev->tasklet, txx9dmac_tasklet); in txx9dmac_probe()
1203 err = devm_request_irq(&pdev->dev, ddev->irq, in txx9dmac_probe()
1204 txx9dmac_interrupt, 0, dev_name(&pdev->dev), ddev); in txx9dmac_probe()
1210 if (pdata && pdata->memcpy_chan >= 0) in txx9dmac_probe()
1211 mcr |= TXX9_DMA_MCR_FIFUM(pdata->memcpy_chan); in txx9dmac_probe()
1223 if (ddev->irq >= 0) { in txx9dmac_remove()
1224 devm_free_irq(&pdev->dev, ddev->irq, ddev); in txx9dmac_remove()
1225 tasklet_kill(&ddev->tasklet); in txx9dmac_remove()
1252 if (pdata && pdata->memcpy_chan >= 0) in txx9dmac_resume_noirq()
1253 mcr |= TXX9_DMA_MCR_FIFUM(pdata->memcpy_chan); in txx9dmac_resume_noirq()
1267 .name = "txx9dmac-chan",
1275 .name = "txx9dmac",
1306 MODULE_ALIAS("platform:txx9dmac-chan");