2751 					    size_t tr_size, int tr_count,  in udma_alloc_tr_desc()  argument
2760 	switch (tr_size) {  in udma_alloc_tr_desc()
2767 		dev_err(uc->ud->dev, "Unsupported TR size of %zu\n", tr_size);  in udma_alloc_tr_desc()
2788 		hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size,  in udma_alloc_tr_desc()
2804 	hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;  in udma_alloc_tr_desc()
2806 	hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size * tr_count;  in udma_alloc_tr_desc()
2818 	cppi5_trdesc_init(tr_desc, tr_count, tr_size, 0, reload_count);  in udma_alloc_tr_desc()
2881 	size_t tr_size;  in udma_prep_slave_sg_tr()  local
2895 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_prep_slave_sg_tr()
2896 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, dir);  in udma_prep_slave_sg_tr()
2968 	size_t tr_size, sg_len;  in udma_prep_slave_sg_triggered_tr()  local
3025 	tr_size = sizeof(struct cppi5_tr_type15_t);  in udma_prep_slave_sg_triggered_tr()
3026 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, dir);  in udma_prep_slave_sg_triggered_tr()
3469 	size_t tr_size, period_addr;  in udma_prep_dma_cyclic_tr()  local
3485 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_prep_dma_cyclic_tr()
3486 	d = udma_alloc_tr_desc(uc, tr_size, periods * num_tr, dir);  in udma_prep_dma_cyclic_tr()
3676 	size_t tr_size = sizeof(struct cppi5_tr_type15_t);  in udma_prep_dma_memcpy()  local
3696 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, DMA_MEM_TO_MEM);  in udma_prep_dma_memcpy()
5061 	size_t tr_size;  in udma_setup_rx_flush()  local
5078 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_setup_rx_flush()
5079 	hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size, 1);  in udma_setup_rx_flush()
5095 	hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;  in udma_setup_rx_flush()
5097 	hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size;  in udma_setup_rx_flush()
5100 	cppi5_trdesc_init(tr_desc, 1, tr_size, 0, 0);  in udma_setup_rx_flush()