Lines Matching refs:echan
178 struct edma_chan *echan; member
399 static void edma_set_chmap(struct edma_chan *echan, int slot) in edma_set_chmap() argument
401 struct edma_cc *ecc = echan->ecc; in edma_set_chmap()
402 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_set_chmap()
410 static void edma_setup_interrupt(struct edma_chan *echan, bool enable) in edma_setup_interrupt() argument
412 struct edma_cc *ecc = echan->ecc; in edma_setup_interrupt()
413 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_setup_interrupt()
555 static void edma_start(struct edma_chan *echan) in edma_start() argument
557 struct edma_cc *ecc = echan->ecc; in edma_start()
558 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_start()
562 if (!echan->hw_triggered) { in edma_start()
582 static void edma_stop(struct edma_chan *echan) in edma_stop() argument
584 struct edma_cc *ecc = echan->ecc; in edma_stop()
585 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_stop()
609 static void edma_pause(struct edma_chan *echan) in edma_pause() argument
611 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_pause()
613 edma_shadow0_write_array(echan->ecc, SH_EECR, in edma_pause()
619 static void edma_resume(struct edma_chan *echan) in edma_resume() argument
621 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_resume()
623 edma_shadow0_write_array(echan->ecc, SH_EESR, in edma_resume()
628 static void edma_trigger_channel(struct edma_chan *echan) in edma_trigger_channel() argument
630 struct edma_cc *ecc = echan->ecc; in edma_trigger_channel()
631 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_trigger_channel()
641 static void edma_clean_channel(struct edma_chan *echan) in edma_clean_channel() argument
643 struct edma_cc *ecc = echan->ecc; in edma_clean_channel()
644 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_clean_channel()
659 static void edma_assign_channel_eventq(struct edma_chan *echan, in edma_assign_channel_eventq() argument
662 struct edma_cc *ecc = echan->ecc; in edma_assign_channel_eventq()
663 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_assign_channel_eventq()
677 static int edma_alloc_channel(struct edma_chan *echan, in edma_alloc_channel() argument
680 struct edma_cc *ecc = echan->ecc; in edma_alloc_channel()
681 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_alloc_channel()
683 if (!test_bit(echan->ch_num, ecc->channels_mask)) { in edma_alloc_channel()
685 echan->ch_num); in edma_alloc_channel()
694 edma_stop(echan); in edma_alloc_channel()
696 edma_setup_interrupt(echan, true); in edma_alloc_channel()
698 edma_assign_channel_eventq(echan, eventq_no); in edma_alloc_channel()
703 static void edma_free_channel(struct edma_chan *echan) in edma_free_channel() argument
706 edma_stop(echan); in edma_free_channel()
708 edma_setup_interrupt(echan, false); in edma_free_channel()
727 static void edma_execute(struct edma_chan *echan) in edma_execute() argument
729 struct edma_cc *ecc = echan->ecc; in edma_execute()
732 struct device *dev = echan->vchan.chan.device->dev; in edma_execute()
735 if (!echan->edesc) { in edma_execute()
737 vdesc = vchan_next_desc(&echan->vchan); in edma_execute()
741 echan->edesc = to_edma_desc(&vdesc->tx); in edma_execute()
744 edesc = echan->edesc; in edma_execute()
754 edma_write_slot(ecc, echan->slot[i], &edesc->pset[j].param); in edma_execute()
768 j, echan->ch_num, echan->slot[i], in edma_execute()
779 edma_link(ecc, echan->slot[i], echan->slot[i + 1]); in edma_execute()
791 edma_link(ecc, echan->slot[nslots - 1], echan->slot[1]); in edma_execute()
793 edma_link(ecc, echan->slot[nslots - 1], in edma_execute()
794 echan->ecc->dummy_slot); in edma_execute()
797 if (echan->missed) { in edma_execute()
803 dev_dbg(dev, "missed event on channel %d\n", echan->ch_num); in edma_execute()
804 edma_clean_channel(echan); in edma_execute()
805 edma_stop(echan); in edma_execute()
806 edma_start(echan); in edma_execute()
807 edma_trigger_channel(echan); in edma_execute()
808 echan->missed = 0; in edma_execute()
811 echan->ch_num); in edma_execute()
812 edma_start(echan); in edma_execute()
815 echan->ch_num, edesc->processed); in edma_execute()
816 edma_resume(echan); in edma_execute()
822 struct edma_chan *echan = to_edma_chan(chan); in edma_terminate_all() local
826 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_terminate_all()
833 if (echan->edesc) { in edma_terminate_all()
834 edma_stop(echan); in edma_terminate_all()
836 if (!echan->tc && echan->edesc->cyclic) in edma_terminate_all()
837 edma_assign_channel_eventq(echan, EVENTQ_DEFAULT); in edma_terminate_all()
839 vchan_terminate_vdesc(&echan->edesc->vdesc); in edma_terminate_all()
840 echan->edesc = NULL; in edma_terminate_all()
843 vchan_get_all_descriptors(&echan->vchan, &head); in edma_terminate_all()
844 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_terminate_all()
845 vchan_dma_desc_free_list(&echan->vchan, &head); in edma_terminate_all()
852 struct edma_chan *echan = to_edma_chan(chan); in edma_synchronize() local
854 vchan_synchronize(&echan->vchan); in edma_synchronize()
860 struct edma_chan *echan = to_edma_chan(chan); in edma_slave_config() local
870 memcpy(&echan->cfg, cfg, sizeof(echan->cfg)); in edma_slave_config()
877 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_pause() local
879 if (!echan->edesc) in edma_dma_pause()
882 edma_pause(echan); in edma_dma_pause()
888 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_resume() local
890 edma_resume(echan); in edma_dma_resume()
910 struct edma_chan *echan = to_edma_chan(chan); in edma_config_pset() local
995 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_config_pset()
1023 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_slave_sg() local
1032 if (unlikely(!echan || !sgl || !sg_len)) in edma_prep_slave_sg()
1036 src_addr = echan->cfg.src_addr; in edma_prep_slave_sg()
1037 dev_width = echan->cfg.src_addr_width; in edma_prep_slave_sg()
1038 burst = echan->cfg.src_maxburst; in edma_prep_slave_sg()
1040 dst_addr = echan->cfg.dst_addr; in edma_prep_slave_sg()
1041 dev_width = echan->cfg.dst_addr_width; in edma_prep_slave_sg()
1042 burst = echan->cfg.dst_maxburst; in edma_prep_slave_sg()
1060 edesc->echan = echan; in edma_prep_slave_sg()
1066 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1067 echan->slot[i] = in edma_prep_slave_sg()
1068 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_slave_sg()
1069 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1111 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_slave_sg()
1121 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_memcpy() local
1124 if (unlikely(!echan || !len)) in edma_prep_dma_memcpy()
1177 edesc->echan = echan; in edma_prep_dma_memcpy()
1197 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1198 echan->slot[1] = edma_alloc_slot(echan->ecc, in edma_prep_dma_memcpy()
1200 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1227 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_memcpy()
1236 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_interleaved() local
1282 edesc->echan = echan; in edma_prep_dma_interleaved()
1294 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_prep_dma_interleaved()
1302 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_interleaved()
1310 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_cyclic() local
1319 if (unlikely(!echan || !buf_len || !period_len)) in edma_prep_dma_cyclic()
1323 src_addr = echan->cfg.src_addr; in edma_prep_dma_cyclic()
1325 dev_width = echan->cfg.src_addr_width; in edma_prep_dma_cyclic()
1326 burst = echan->cfg.src_maxburst; in edma_prep_dma_cyclic()
1329 dst_addr = echan->cfg.dst_addr; in edma_prep_dma_cyclic()
1330 dev_width = echan->cfg.dst_addr_width; in edma_prep_dma_cyclic()
1331 burst = echan->cfg.dst_maxburst; in edma_prep_dma_cyclic()
1381 edesc->echan = echan; in edma_prep_dma_cyclic()
1384 __func__, echan->ch_num, nslots, period_len, buf_len); in edma_prep_dma_cyclic()
1388 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1389 echan->slot[i] = in edma_prep_dma_cyclic()
1390 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_dma_cyclic()
1391 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1431 i, echan->ch_num, echan->slot[i], in edma_prep_dma_cyclic()
1456 if (!echan->tc) in edma_prep_dma_cyclic()
1457 edma_assign_channel_eventq(echan, EVENTQ_0); in edma_prep_dma_cyclic()
1459 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_cyclic()
1462 static void edma_completion_handler(struct edma_chan *echan) in edma_completion_handler() argument
1464 struct device *dev = echan->vchan.chan.device->dev; in edma_completion_handler()
1467 spin_lock(&echan->vchan.lock); in edma_completion_handler()
1468 edesc = echan->edesc; in edma_completion_handler()
1472 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1476 edma_stop(echan); in edma_completion_handler()
1478 echan->edesc = NULL; in edma_completion_handler()
1481 echan->ch_num); in edma_completion_handler()
1484 echan->ch_num); in edma_completion_handler()
1486 edma_pause(echan); in edma_completion_handler()
1493 edma_execute(echan); in edma_completion_handler()
1496 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1545 static void edma_error_handler(struct edma_chan *echan) in edma_error_handler() argument
1547 struct edma_cc *ecc = echan->ecc; in edma_error_handler()
1548 struct device *dev = echan->vchan.chan.device->dev; in edma_error_handler()
1552 if (!echan->edesc) in edma_error_handler()
1555 spin_lock(&echan->vchan.lock); in edma_error_handler()
1557 err = edma_read_slot(ecc, echan->slot[0], &p); in edma_error_handler()
1573 echan->missed = 1; in edma_error_handler()
1580 edma_clean_channel(echan); in edma_error_handler()
1581 edma_stop(echan); in edma_error_handler()
1582 edma_start(echan); in edma_error_handler()
1583 edma_trigger_channel(echan); in edma_error_handler()
1585 spin_unlock(&echan->vchan.lock); in edma_error_handler()
1676 struct edma_chan *echan = to_edma_chan(chan); in edma_alloc_chan_resources() local
1677 struct edma_cc *ecc = echan->ecc; in edma_alloc_chan_resources()
1682 if (echan->tc) { in edma_alloc_chan_resources()
1683 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1686 echan->tc = &ecc->tc_list[ecc->info->default_queue]; in edma_alloc_chan_resources()
1687 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1690 ret = edma_alloc_channel(echan, eventq_no); in edma_alloc_chan_resources()
1694 echan->slot[0] = edma_alloc_slot(ecc, echan->ch_num); in edma_alloc_chan_resources()
1695 if (echan->slot[0] < 0) { in edma_alloc_chan_resources()
1697 EDMA_CHAN_SLOT(echan->ch_num)); in edma_alloc_chan_resources()
1698 ret = echan->slot[0]; in edma_alloc_chan_resources()
1703 edma_set_chmap(echan, echan->slot[0]); in edma_alloc_chan_resources()
1704 echan->alloced = true; in edma_alloc_chan_resources()
1707 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id, in edma_alloc_chan_resources()
1708 echan->hw_triggered ? "HW" : "SW"); in edma_alloc_chan_resources()
1713 edma_free_channel(echan); in edma_alloc_chan_resources()
1720 struct edma_chan *echan = to_edma_chan(chan); in edma_free_chan_resources() local
1721 struct device *dev = echan->ecc->dev; in edma_free_chan_resources()
1725 edma_stop(echan); in edma_free_chan_resources()
1727 vchan_free_chan_resources(&echan->vchan); in edma_free_chan_resources()
1731 if (echan->slot[i] >= 0) { in edma_free_chan_resources()
1732 edma_free_slot(echan->ecc, echan->slot[i]); in edma_free_chan_resources()
1733 echan->slot[i] = -1; in edma_free_chan_resources()
1738 edma_set_chmap(echan, echan->ecc->dummy_slot); in edma_free_chan_resources()
1741 if (echan->alloced) { in edma_free_chan_resources()
1742 edma_free_channel(echan); in edma_free_chan_resources()
1743 echan->alloced = false; in edma_free_chan_resources()
1746 echan->tc = NULL; in edma_free_chan_resources()
1747 echan->hw_triggered = false; in edma_free_chan_resources()
1750 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id); in edma_free_chan_resources()
1756 struct edma_chan *echan = to_edma_chan(chan); in edma_issue_pending() local
1759 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_issue_pending()
1760 if (vchan_issue_pending(&echan->vchan) && !echan->edesc) in edma_issue_pending()
1761 edma_execute(echan); in edma_issue_pending()
1762 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_issue_pending()
1778 struct edma_chan *echan = edesc->echan; in edma_residue() local
1781 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_residue()
1791 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1807 while (edma_shadow0_read_array(echan->ecc, event_reg, idx) & ch_bit) { in edma_residue()
1808 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1813 dev_dbg_ratelimited(echan->vchan.chan.device->dev, in edma_residue()
1868 struct edma_chan *echan = to_edma_chan(chan); in edma_tx_status() local
1882 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_tx_status()
1883 if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1884 txstate->residue = edma_residue(echan->edesc); in edma_tx_status()
1886 struct virt_dma_desc *vdesc = vchan_find_desc(&echan->vchan, in edma_tx_status()
1900 echan->edesc && echan->edesc->polled && in edma_tx_status()
1901 echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1902 edma_stop(echan); in edma_tx_status()
1903 vchan_cookie_complete(&echan->edesc->vdesc); in edma_tx_status()
1904 echan->edesc = NULL; in edma_tx_status()
1905 edma_execute(echan); in edma_tx_status()
1909 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_tx_status()
2011 struct edma_chan *echan = &ecc->slave_chans[i]; in edma_dma_init() local
2012 echan->ch_num = EDMA_CTLR_CHAN(ecc->id, i); in edma_dma_init()
2013 echan->ecc = ecc; in edma_dma_init()
2014 echan->vchan.desc_free = edma_desc_free; in edma_dma_init()
2017 vchan_init(&echan->vchan, m_ddev); in edma_dma_init()
2019 vchan_init(&echan->vchan, s_ddev); in edma_dma_init()
2021 INIT_LIST_HEAD(&echan->node); in edma_dma_init()
2023 echan->slot[j] = -1; in edma_dma_init()
2243 struct edma_chan *echan; in of_edma_xlate() local
2250 echan = &ecc->slave_chans[i]; in of_edma_xlate()
2251 if (echan->ch_num == dma_spec->args[0]) { in of_edma_xlate()
2252 chan = &echan->vchan.chan; in of_edma_xlate()
2260 if (echan->ecc->legacy_mode && dma_spec->args_count == 1) in of_edma_xlate()
2263 if (!echan->ecc->legacy_mode && dma_spec->args_count == 2 && in of_edma_xlate()
2264 dma_spec->args[1] < echan->ecc->num_tc) { in of_edma_xlate()
2265 echan->tc = &echan->ecc->tc_list[dma_spec->args[1]]; in of_edma_xlate()
2272 echan->hw_triggered = true; in of_edma_xlate()
2553 struct edma_chan *echan, *_echan; in edma_cleanupp_vchan() local
2555 list_for_each_entry_safe(echan, _echan, in edma_cleanupp_vchan()
2557 list_del(&echan->vchan.chan.device_node); in edma_cleanupp_vchan()
2558 tasklet_kill(&echan->vchan.task); in edma_cleanupp_vchan()
2588 struct edma_chan *echan = ecc->slave_chans; in edma_pm_suspend() local
2592 if (echan[i].alloced) in edma_pm_suspend()
2593 edma_setup_interrupt(&echan[i], false); in edma_pm_suspend()
2602 struct edma_chan *echan = ecc->slave_chans; in edma_pm_resume() local
2617 if (echan[i].alloced) { in edma_pm_resume()
2623 edma_setup_interrupt(&echan[i], true); in edma_pm_resume()
2626 edma_set_chmap(&echan[i], echan[i].slot[0]); in edma_pm_resume()
2667 struct edma_chan *echan = to_edma_chan(chan); in edma_filter_fn() local
2669 if (ch_req == echan->ch_num) { in edma_filter_fn()
2671 echan->hw_triggered = true; in edma_filter_fn()