11 #include "fsl-edma-common.h"
47 	struct edma_regs *regs = &fsl_chan->edma->regs;  in fsl_edma_enable_request()
50 	if (fsl_chan->edma->drvdata->version == v1) {  in fsl_edma_enable_request()
51 		edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei);  in fsl_edma_enable_request()
52 		edma_writeb(fsl_chan->edma, ch, regs->serq);  in fsl_edma_enable_request()
64 	struct edma_regs *regs = &fsl_chan->edma->regs;  in fsl_edma_disable_request()
67 	if (fsl_chan->edma->drvdata->version == v1) {  in fsl_edma_disable_request()
68 		edma_writeb(fsl_chan->edma, ch, regs->cerq);  in fsl_edma_disable_request()
69 		edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei);  in fsl_edma_disable_request()
113 	u32 dmamux_nr = fsl_chan->edma->drvdata->dmamuxs;  in fsl_edma_chan_mux()
115 	chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr;  in fsl_edma_chan_mux()
118 	if (fsl_chan->edma->drvdata->mux_swap)  in fsl_edma_chan_mux()
121 	muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];  in fsl_edma_chan_mux()
124 	if (fsl_chan->edma->drvdata->version == v3)  in fsl_edma_chan_mux()
274 	struct edma_regs *regs = &fsl_chan->edma->regs;  in fsl_edma_desc_residue()
290 		cur_addr = edma_readl(fsl_chan->edma, &regs->tcd[ch].saddr);  in fsl_edma_desc_residue()
292 		cur_addr = edma_readl(fsl_chan->edma, &regs->tcd[ch].daddr);  in fsl_edma_desc_residue()
348 	struct fsl_edma_engine *edma = fsl_chan->edma;  in fsl_edma_set_tcd_regs()  local
349 	struct edma_regs *regs = &fsl_chan->edma->regs;  in fsl_edma_set_tcd_regs()
356 	 * big- or little-endian obeying the eDMA engine model endian,  in fsl_edma_set_tcd_regs()
359 	edma_writew(edma, 0,  &regs->tcd[ch].csr);  in fsl_edma_set_tcd_regs()
361 	edma_writel(edma, (s32)tcd->saddr, &regs->tcd[ch].saddr);  in fsl_edma_set_tcd_regs()
362 	edma_writel(edma, (s32)tcd->daddr, &regs->tcd[ch].daddr);  in fsl_edma_set_tcd_regs()
364 	edma_writew(edma, (s16)tcd->attr, &regs->tcd[ch].attr);  in fsl_edma_set_tcd_regs()
365 	edma_writew(edma, tcd->soff, &regs->tcd[ch].soff);  in fsl_edma_set_tcd_regs()
367 	edma_writel(edma, (s32)tcd->nbytes, &regs->tcd[ch].nbytes);  in fsl_edma_set_tcd_regs()
368 	edma_writel(edma, (s32)tcd->slast, &regs->tcd[ch].slast);  in fsl_edma_set_tcd_regs()
370 	edma_writew(edma, (s16)tcd->citer, &regs->tcd[ch].citer);  in fsl_edma_set_tcd_regs()
371 	edma_writew(edma, (s16)tcd->biter, &regs->tcd[ch].biter);  in fsl_edma_set_tcd_regs()
372 	edma_writew(edma, (s16)tcd->doff, &regs->tcd[ch].doff);  in fsl_edma_set_tcd_regs()
374 	edma_writel(edma, (s32)tcd->dlast_sga,  in fsl_edma_set_tcd_regs()
383 	edma_writew(edma, (s16)tcd->csr, &regs->tcd[ch].csr);  in fsl_edma_set_tcd_regs()
395 	 * eDMA hardware SGs require the TCDs to be stored in little  in fsl_edma_fill_tcd()
668 	struct fsl_edma_engine *edma = fsl_chan->edma;  in fsl_edma_free_chan_resources()  local
674 	if (edma->drvdata->dmamuxs)  in fsl_edma_free_chan_resources()
701  * On the 32 channels Vybrid/mpc577x edma version (here called "v1"),
703  * edma (here called "v2").
707  * edma "version" and "membase" appropriately.
709 void fsl_edma_setup_regs(struct fsl_edma_engine *edma)  in fsl_edma_setup_regs()  argument
711 	edma->regs.cr = edma->membase + EDMA_CR;  in fsl_edma_setup_regs()
712 	edma->regs.es = edma->membase + EDMA_ES;  in fsl_edma_setup_regs()
713 	edma->regs.erql = edma->membase + EDMA_ERQ;  in fsl_edma_setup_regs()
714 	edma->regs.eeil = edma->membase + EDMA_EEI;  in fsl_edma_setup_regs()
716 	edma->regs.serq = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
718 	edma->regs.cerq = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
720 	edma->regs.seei = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
722 	edma->regs.ceei = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
724 	edma->regs.cint = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
726 	edma->regs.cerr = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
728 	edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
730 	edma->regs.cdne = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
732 	edma->regs.intl = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
734 	edma->regs.errl = edma->membase + ((edma->drvdata->version == v2) ?  in fsl_edma_setup_regs()
737 	if (edma->drvdata->version == v2) {  in fsl_edma_setup_regs()
738 		edma->regs.erqh = edma->membase + EDMA64_ERQH;  in fsl_edma_setup_regs()
739 		edma->regs.eeih = edma->membase + EDMA64_EEIH;  in fsl_edma_setup_regs()
740 		edma->regs.errh = edma->membase + EDMA64_ERRH;  in fsl_edma_setup_regs()
741 		edma->regs.inth = edma->membase + EDMA64_INTH;  in fsl_edma_setup_regs()
744 	edma->regs.tcd = edma->membase + EDMA_TCD;  in fsl_edma_setup_regs()