74 	unsigned int no;  member
175 	if (direction != admac_chan_direction(adchan->no))  in admac_prep_dma_cyclic()
309 		residue = admac_cyclic_read_residue(ad, adchan->no, adtx);  in admac_tx_status()
329 	u32 startbit = 1 << (adchan->no / 2);  in admac_start_chan()
332 		       ad->base + REG_CHAN_INTSTATUS(adchan->no, ad->irq_index));  in admac_start_chan()
334 		       ad->base + REG_CHAN_INTMASK(adchan->no, ad->irq_index));  in admac_start_chan()
336 	switch (admac_chan_direction(adchan->no)) {  in admac_start_chan()
346 	dev_dbg(adchan->host->dev, "ch%d start\n", adchan->no);  in admac_start_chan()
352 	u32 stopbit = 1 << (adchan->no / 2);  in admac_stop_chan()
354 	switch (admac_chan_direction(adchan->no)) {  in admac_stop_chan()
364 	dev_dbg(adchan->host->dev, "ch%d stop\n", adchan->no);  in admac_stop_chan()
372 		       ad->base + REG_CHAN_CTL(adchan->no));  in admac_reset_rings()
373 	writel_relaxed(0, ad->base + REG_CHAN_CTL(adchan->no));  in admac_reset_rings()
379 	int ch = adchan->no;  in admac_start_current_tx()
569 static void admac_handle_chan_int(struct admac_data *ad, int no)  in admac_handle_chan_int()  argument
571 	u32 cause = readl_relaxed(ad->base + REG_CHAN_INTSTATUS(no, ad->irq_index));  in admac_handle_chan_int()
574 		admac_handle_status_err(ad, no);  in admac_handle_chan_int()
577 		admac_handle_status_desc_done(ad, no);  in admac_handle_chan_int()
637 	bool is_tx = admac_chan_direction(adchan->no) == DMA_MEM_TO_DEV;  in admac_device_config()
678 	writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no));  in admac_device_config()
689 		       ad->base + REG_CHAN_FIFOCTL(adchan->no));  in admac_device_config()
769 		adchan->no = i;  in admac_probe()