1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/io-64-nonatomic-lo-hi.h>
14  * Vendor-specific) and / or descriptors provided by platform firmware.
25  * cxl_probe_component_regs() - Detect CXL Component register blocks
44 	 * CXL.cache and CXL.mem registers are at offset 0x1000 as defined in  in cxl_probe_component_regs()
64 		u16 cap_id, offset;  in cxl_probe_component_regs()  local
70 		offset = FIELD_GET(CXL_CM_CAP_PTR_MASK, hdr);  in cxl_probe_component_regs()
71 		register_block = base + offset;  in cxl_probe_component_regs()
75 			dev_dbg(dev, "found HDM decoder capability (0x%x)\n",  in cxl_probe_component_regs()
76 				offset);  in cxl_probe_component_regs()
83 			map->hdm_decoder.valid = true;  in cxl_probe_component_regs()
84 			map->hdm_decoder.offset = CXL_CM_OFFSET + offset;  in cxl_probe_component_regs()
85 			map->hdm_decoder.size = length;  in cxl_probe_component_regs()
88 			dev_dbg(dev, "Unknown CM cap ID: %d (0x%x)\n", cap_id,  in cxl_probe_component_regs()
89 				offset);  in cxl_probe_component_regs()
97  * cxl_probe_device_regs() - Detect CXL Device register blocks
120 		u32 offset, length;  in cxl_probe_device_regs()  local
125 		offset = readl(base + cap * 0x10 + 0x4);  in cxl_probe_device_regs()
130 			dev_dbg(dev, "found Status capability (0x%x)\n", offset);  in cxl_probe_device_regs()
132 			map->status.valid = true;  in cxl_probe_device_regs()
133 			map->status.offset = offset;  in cxl_probe_device_regs()
134 			map->status.size = length;  in cxl_probe_device_regs()
137 			dev_dbg(dev, "found Mailbox capability (0x%x)\n", offset);  in cxl_probe_device_regs()
138 			map->mbox.valid = true;  in cxl_probe_device_regs()
139 			map->mbox.offset = offset;  in cxl_probe_device_regs()
140 			map->mbox.size = length;  in cxl_probe_device_regs()
143 			dev_dbg(dev, "found Secondary Mailbox capability (0x%x)\n", offset);  in cxl_probe_device_regs()
146 			dev_dbg(dev, "found Memory Device capability (0x%x)\n", offset);  in cxl_probe_device_regs()
147 			map->memdev.valid = true;  in cxl_probe_device_regs()
148 			map->memdev.offset = offset;  in cxl_probe_device_regs()
149 			map->memdev.size = length;  in cxl_probe_device_regs()
153 				dev_dbg(dev, "Vendor cap ID: %#x offset: %#x\n", cap_id, offset);  in cxl_probe_device_regs()
155 				dev_dbg(dev, "Unknown cap ID: %#x offset: %#x\n", cap_id, offset);  in cxl_probe_device_regs()
170 		resource_size_t end = addr + length - 1;  in devm_cxl_iomap_block()
172 		dev_err(dev, "Failed to request region %pa-%pa\n", &addr, &end);  in devm_cxl_iomap_block()
187 	struct device *dev = &pdev->dev;  in cxl_map_component_regs()
191 	phys_addr = pci_resource_start(pdev, map->barno);  in cxl_map_component_regs()
192 	phys_addr += map->block_offset;  in cxl_map_component_regs()
194 	phys_addr += map->component_map.hdm_decoder.offset;  in cxl_map_component_regs()
195 	length = map->component_map.hdm_decoder.size;  in cxl_map_component_regs()
196 	regs->hdm_decoder = devm_cxl_iomap_block(dev, phys_addr, length);  in cxl_map_component_regs()
197 	if (!regs->hdm_decoder)  in cxl_map_component_regs()
198 		return -ENOMEM;  in cxl_map_component_regs()
208 	struct device *dev = &pdev->dev;  in cxl_map_device_regs()
211 	phys_addr = pci_resource_start(pdev, map->barno);  in cxl_map_device_regs()
212 	phys_addr += map->block_offset;  in cxl_map_device_regs()
214 	if (map->device_map.status.valid) {  in cxl_map_device_regs()
218 		addr = phys_addr + map->device_map.status.offset;  in cxl_map_device_regs()
219 		length = map->device_map.status.size;  in cxl_map_device_regs()
220 		regs->status = devm_cxl_iomap_block(dev, addr, length);  in cxl_map_device_regs()
221 		if (!regs->status)  in cxl_map_device_regs()
222 			return -ENOMEM;  in cxl_map_device_regs()
225 	if (map->device_map.mbox.valid) {  in cxl_map_device_regs()
229 		addr = phys_addr + map->device_map.mbox.offset;  in cxl_map_device_regs()
230 		length = map->device_map.mbox.size;  in cxl_map_device_regs()
231 		regs->mbox = devm_cxl_iomap_block(dev, addr, length);  in cxl_map_device_regs()
232 		if (!regs->mbox)  in cxl_map_device_regs()
233 			return -ENOMEM;  in cxl_map_device_regs()
236 	if (map->device_map.memdev.valid) {  in cxl_map_device_regs()
240 		addr = phys_addr + map->device_map.memdev.offset;  in cxl_map_device_regs()
241 		length = map->device_map.memdev.size;  in cxl_map_device_regs()
242 		regs->memdev = devm_cxl_iomap_block(dev, addr, length);  in cxl_map_device_regs()
243 		if (!regs->memdev)  in cxl_map_device_regs()
244 			return -ENOMEM;  in cxl_map_device_regs()
254 	map->block_offset = ((u64)reg_hi << 32) |  in cxl_decode_regblock()
256 	map->barno = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BIR_MASK, reg_lo);  in cxl_decode_regblock()
257 	map->reg_type = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BLOCK_ID_MASK, reg_lo);  in cxl_decode_regblock()
261  * cxl_find_regblock() - Locate register blocks by type
277 	map->block_offset = U64_MAX;  in cxl_find_regblock()
281 		return -ENXIO;  in cxl_find_regblock()
287 	regblocks = (regloc_size - CXL_DVSEC_REG_LOCATOR_BLOCK1_OFFSET) / 8;  in cxl_find_regblock()
297 		if (map->reg_type == type)  in cxl_find_regblock()
301 	map->block_offset = U64_MAX;  in cxl_find_regblock()
302 	return -ENODEV;  in cxl_find_regblock()