138 	union otx2_cptx_lf_misc_int_ena_w1s irq_misc = { .u = 0x0 };  in cptlf_set_misc_intrs()  local
143 	irq_misc.s.fault = 0x1;  in cptlf_set_misc_intrs()
144 	irq_misc.s.hwerr = 0x1;  in cptlf_set_misc_intrs()
145 	irq_misc.s.irde = 0x1;  in cptlf_set_misc_intrs()
146 	irq_misc.s.nqerr = 0x1;  in cptlf_set_misc_intrs()
147 	irq_misc.s.nwrp = 0x1;  in cptlf_set_misc_intrs()
151 				 irq_misc.u);  in cptlf_set_misc_intrs()
187 	union otx2_cptx_lf_misc_int irq_misc, irq_misc_ack;  in cptlf_misc_intr_handler()  local
192 	irq_misc.u = otx2_cpt_read64(lf->lfs->reg_base, BLKADDR_CPT0, lf->slot,  in cptlf_misc_intr_handler()
196 	if (irq_misc.s.fault) {  in cptlf_misc_intr_handler()
201 	} else if (irq_misc.s.hwerr) {  in cptlf_misc_intr_handler()
206 	} else if (irq_misc.s.nwrp) {  in cptlf_misc_intr_handler()
211 	} else if (irq_misc.s.irde) {  in cptlf_misc_intr_handler()
215 	} else if (irq_misc.s.nqerr) {  in cptlf_misc_intr_handler()