Lines Matching refs:state_sz
64 u32 state_sz; member
489 alg, ctx->state_sz)) in safexcel_aead_setkey()
518 ctrl_size += ctx->state_sz / sizeof(u32); in safexcel_context_control()
536 ctrl_size += ctx->state_sz / sizeof(u32) * 2; in safexcel_context_control()
709 &ctx->base.ipad, ctx->state_sz); in safexcel_send_req()
712 ctx->state_sz) / sizeof(u32), &ctx->base.opad, in safexcel_send_req()
713 ctx->state_sz); in safexcel_send_req()
1745 ctx->state_sz = SHA1_DIGEST_SIZE; in safexcel_aead_sha1_cra_init()
1781 ctx->state_sz = SHA256_DIGEST_SIZE; in safexcel_aead_sha256_cra_init()
1817 ctx->state_sz = SHA256_DIGEST_SIZE; in safexcel_aead_sha224_cra_init()
1853 ctx->state_sz = SHA512_DIGEST_SIZE; in safexcel_aead_sha512_cra_init()
1889 ctx->state_sz = SHA512_DIGEST_SIZE; in safexcel_aead_sha384_cra_init()
2635 ctx->state_sz = GHASH_BLOCK_SIZE; in safexcel_aead_gcm_cra_init()
2711 ctx->state_sz = 2 * AES_BLOCK_SIZE + len; in safexcel_aead_ccm_setkey()
2730 ctx->state_sz = 3 * AES_BLOCK_SIZE; in safexcel_aead_ccm_cra_init()
2990 ctx->state_sz = 0; /* Precomputed by HW */ in safexcel_aead_chachapoly_cra_init()
3346 ctx->state_sz = SHA1_DIGEST_SIZE; in safexcel_aead_sm4cbc_sha1_cra_init()
3455 ctx->state_sz = SM3_DIGEST_SIZE; in safexcel_aead_sm4cbc_sm3_cra_init()