21 #define EMU_BIST_STATUSX(_i)	(0x1402700 + ((_i) * 0x40000))  argument
29 #define EFL_CORE_BIST_REGX(_i)	(0x1240100 + ((_i) * 0x400))  argument
33 #define PEM_BIST_STATUSX(_i)	(0x1080468 | ((_i) << 18))  argument
36 #define EMU_SE_ENABLEX(_i)	(0x1400000 + ((_i) * 0x40000))  argument
37 #define EMU_AE_ENABLEX(_i)	(0x1400008 + ((_i) * 0x40000))  argument
38 #define EMU_WD_INT_ENA_W1SX(_i)	(0x1402318 + ((_i) * 0x40000))  argument
39 #define EMU_GE_INT_ENA_W1SX(_i)	(0x1402518 + ((_i) * 0x40000))  argument
40 #define EMU_FUSE_MAPX(_i)	(0x1402708 + ((_i) * 0x40000))  argument
43 #define UCD_SE_EID_UCODE_BLOCK_NUMX(_i)	(0x12C0000 + ((_i) * 0x1000))  argument
44 #define UCD_AE_EID_UCODE_BLOCK_NUMX(_i)	(0x12C0008 + ((_i) * 0x800))  argument
46 #define UCD_UCODE_LOAD_IDX_DATAX(_i)	(0x12C0018 + ((_i) * 0x20))  argument
47 #define UCD_SE_CNTX(_i)			(0x12C0040 + ((_i) * 0x1000))  argument
48 #define UCD_AE_CNTX(_i)			(0x12C0048 + ((_i) * 0x800))  argument
138 #define NPS_PKT_IN_INSTR_CTLX(_i)	(0x10060 + ((_i) * 0x40000))  argument
139 #define NPS_PKT_IN_INSTR_BADDRX(_i)	(0x10068 + ((_i) * 0x40000))  argument
140 #define NPS_PKT_IN_INSTR_RSIZEX(_i)	(0x10070 + ((_i) * 0x40000))  argument
141 #define NPS_PKT_IN_DONE_CNTSX(_i)	(0x10080 + ((_i) * 0x40000))  argument
142 #define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)	(0x10078 + ((_i) * 0x40000))  argument
143 #define NPS_PKT_IN_INT_LEVELSX(_i)		(0x10088 + ((_i) * 0x40000))  argument
152 #define NPS_PKT_MBOX_PF_VF_PFDATAX(_i)	(0x1040800 + ((_i) * 0x8))  argument
153 #define NPS_PKT_MBOX_VF_PF_PFDATAX(_i)	(0x1040C00 + ((_i) * 0x8))  argument
155 #define NPS_PKT_SLC_CTLX(_i)		(0x10000 + ((_i) * 0x40000))  argument
156 #define NPS_PKT_SLC_CNTSX(_i)		(0x10008 + ((_i) * 0x40000))  argument
157 #define NPS_PKT_SLC_INT_LEVELSX(_i)	(0x10010 + ((_i) * 0x40000))  argument
161 #define POM_GRP_EXECMASKX(_i)	(0x11C1100 | ((_i) * 8))  argument
172 #define EFL_CORE_INT_ENA_W1SX(_i)		(0x1240018 + ((_i) * 0x400))  argument
173 #define EFL_CORE_VF_ERR_INT0X(_i)		(0x1240050 + ((_i) * 0x400))  argument
174 #define EFL_CORE_VF_ERR_INT0_ENA_W1SX(_i)	(0x1240068 + ((_i) * 0x400))  argument
175 #define EFL_CORE_VF_ERR_INT1X(_i)		(0x1240070 + ((_i) * 0x400))  argument
176 #define EFL_CORE_VF_ERR_INT1_ENA_W1SX(_i)	(0x1240088 + ((_i) * 0x400))  argument
177 #define EFL_CORE_SE_ERR_INTX(_i)		(0x12400A0 + ((_i) * 0x400))  argument
179 #define EFL_CORE_INTX(_i)			(0x1240000 + ((_i) * 0x400))  argument