84 	clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);  in caam_reset_hw_jr()
87 	wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);  in caam_reset_hw_jr()
88 	while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==  in caam_reset_hw_jr()
92 	if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=  in caam_reset_hw_jr()
100 	wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);  in caam_reset_hw_jr()
101 	while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)  in caam_reset_hw_jr()
110 	clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);  in caam_reset_hw_jr()
177 	irqstate = rd_reg32(&jrp->rregs->jrintstatus);  in caam_jr_interrupt()
192 	clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);  in caam_jr_interrupt()
195 	wr_reg32(&jrp->rregs->jrintstatus, irqstate);  in caam_jr_interrupt()
216 	       (outring_used = rd_reg32(&jrp->rregs->outring_used))) {  in caam_jr_dequeue()
258 		wr_reg32(&jrp->rregs->outring_rmvd, 1);  in caam_jr_dequeue()
283 	clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);  in caam_jr_dequeue()
421 	wr_reg32(&jrp->rregs->inpring_jobadd, 1);  in caam_jr_enqueue()
425 		jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail);  in caam_jr_enqueue()
473 	wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);  in caam_jr_init()
474 	wr_reg64(&jrp->rregs->outring_base, outbusaddr);  in caam_jr_init()
475 	wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);  in caam_jr_init()
476 	wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);  in caam_jr_init()
483 	clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |  in caam_jr_init()
544 	jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl;  in caam_jr_probe()