Lines Matching +full:use +full:- +full:minimum +full:- +full:ecc
1 # SPDX-License-Identifier: GPL-2.0-only
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
48 Use VIA PadLock for SHA1/SHA256 algorithms.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
104 down the use of the available crypto hardware.
113 kernel or userspace applications may use these functions.
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
141 Select this option if you want to use the s390 pseudo random number
143 and uses triple-DES to generate secure random numbers like the
144 ANSI X9.17 standard. User-space programs access the
145 pseudo-random-number device through the char device /dev/prandom.
161 sub-units. One set provides the Modular Arithmetic Unit,
216 Say 'Y' here to use the Freescale Security Engine (SEC)
231 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
240 Say 'Y' here to use the Freescale Security Engine (SEC)
277 This option provides the kernel-side support for the TRNG hardware
285 you want to use the OMAP modules for any of the crypto algorithms.
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
314 want to use the OMAP module for AES algorithms.
324 want to use the OMAP module for DES and 3DES algorithms. Currently
346 This driver provides kernel-side support through the
351 module will be called exynos-rng.
376 needed for small and zero-size messages.
394 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
397 Driver for ST-Ericsson UX500 crypto engine.
410 Select this if you want to use the Atmel modules for
423 Select this if you want to use the Atmel module for
427 will be called atmel-aes.
436 Select this if you want to use the Atmel module for
440 will be called atmel-tdes.
449 Select this if you want to use the Atmel module for
453 will be called atmel-sha.
460 tristate "Support for Microchip / Atmel ECC hw accelerator"
466 Microhip / Atmel ECC hw accelerator.
467 Select this if you want to use the Microchip / Atmel module for
471 will be called atmel-ecc.
481 Select this if you want to use the Microchip / Atmel SHA204A
486 will be called atmel-sha204a.
510 co-processor on the die.
513 will be called mxs-dcp.
565 (default), hashes-only, or skciphers-only.
568 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
572 algorithms, sharing the load with the CPU. Enabling skciphers-only
582 - AES (CBC, CTR, ECB, XTS)
583 - 3DES (CBC, ECB)
584 - DES (CBC, ECB)
585 - SHA1, HMAC-SHA1
586 - SHA256, HMAC-SHA256
589 bool "Symmetric-key ciphers only"
592 Enable symmetric-key ciphers only:
593 - AES (CBC, CTR, ECB, XTS)
594 - 3DES (ECB, CBC)
595 - DES (ECB, CBC)
602 - SHA1, HMAC-SHA1
603 - SHA256, HMAC-SHA256
610 - authenc()
611 - ccm(aes)
612 - rfc4309(ccm(aes))
616 int "Default maximum request size to use software for AES"
625 Considering the 256-bit ciphers, software is 2-3 times faster than
626 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
627 With 128-bit keys, the break-even point would be around 1024-bytes.
630 cost in CPU usage. The minimum recommended setting is 16-bytes
631 (1 AES block), since AES-GCM will fail if you set it lower.
634 Note that 192-bit keys are not supported by the hardware and are
647 module will be called qcom-rng. If unsure, say N.
691 Xilinx ZynqMP has AES-GCM engine used for symmetric key
693 accelerator. Select this if you want to use the ZynqMP module
703 Select this if you want to use the ZynqMP module
744 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
748 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
751 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
764 Enables the driver for the on-chip crypto accelerator
794 Choose this if you wish to use hardware acceleration of
815 used for crypto offload. Select this if you want to use hardware