Lines Matching +full:omap +full:- +full:mailbox
1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
143 and uses triple-DES to generate secure random numbers like the
144 ANSI X9.17 standard. User-space programs access the
145 pseudo-random-number device through the char device /dev/prandom.
161 sub-units. One set provides the Modular Arithmetic Unit,
277 This option provides the kernel-side support for the TRNG hardware
281 tristate "Support for OMAP crypto HW accelerators"
284 OMAP processors have various crypto HW accelerators. Select this if
285 you want to use the OMAP modules for any of the crypto algorithms.
290 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
303 tristate "Support for OMAP AES hw engine"
313 OMAP processors have AES module accelerator. Select this if you
314 want to use the OMAP module for AES algorithms.
317 tristate "Support for OMAP DES/3DES hw engine"
323 OMAP processors have DES/3DES module accelerator. Select this if you
324 want to use the OMAP module for DES and 3DES algorithms. Currently
346 This driver provides kernel-side support through the
351 module will be called exynos-rng.
376 needed for small and zero-size messages.
394 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
397 Driver for ST-Ericsson UX500 crypto engine.
427 will be called atmel-aes.
440 will be called atmel-tdes.
453 will be called atmel-sha.
471 will be called atmel-ecc.
486 will be called atmel-sha204a.
510 co-processor on the die.
513 will be called mxs-dcp.
565 (default), hashes-only, or skciphers-only.
568 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
572 algorithms, sharing the load with the CPU. Enabling skciphers-only
582 - AES (CBC, CTR, ECB, XTS)
583 - 3DES (CBC, ECB)
584 - DES (CBC, ECB)
585 - SHA1, HMAC-SHA1
586 - SHA256, HMAC-SHA256
589 bool "Symmetric-key ciphers only"
592 Enable symmetric-key ciphers only:
593 - AES (CBC, CTR, ECB, XTS)
594 - 3DES (ECB, CBC)
595 - DES (ECB, CBC)
602 - SHA1, HMAC-SHA1
603 - SHA256, HMAC-SHA256
610 - authenc()
611 - ccm(aes)
612 - rfc4309(ccm(aes))
625 Considering the 256-bit ciphers, software is 2-3 times faster than
626 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
627 With 128-bit keys, the break-even point would be around 1024-bytes.
630 cost in CPU usage. The minimum recommended setting is 16-bytes
631 (1 AES block), since AES-GCM will fail if you set it lower.
634 Note that 192-bit keys are not supported by the hardware and are
647 module will be called qcom-rng. If unsure, say N.
691 Xilinx ZynqMP has AES-GCM engine used for symmetric key
713 depends on MAILBOX
744 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
748 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
751 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
764 Enables the driver for the on-chip crypto accelerator