Lines Matching full:aes
29 tristate "PadLock driver for AES algorithm"
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
56 tristate "Support for the Geode LX AES engine"
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
65 will be called geode-aes.
131 AES cipher algorithms for use with protected key.
303 tristate "Support for OMAP AES hw engine"
313 OMAP processors have AES module accelerator. Select this if you
314 want to use the OMAP module for AES algorithms.
363 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
408 Some Atmel processors can combine the AES and SHA hw accelerators
414 tristate "Support for Atmel AES hw accelerator"
422 Some Atmel processors have AES hw accelerator.
424 AES algorithms.
427 will be called atmel-aes.
582 - AES (CBC, CTR, ECB, XTS)
593 - AES (CBC, CTR, ECB, XTS)
611 - ccm(aes)
612 - rfc4309(ccm(aes))
616 int "Default maximum request size to use software for AES"
620 This sets the default maximum request size to perform AES requests
631 (1 AES block), since AES-GCM will fail if you set it lower.
682 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
685 tristate "Support for Xilinx ZynqMP AES hw accelerator"
691 Xilinx ZynqMP has AES-GCM engine used for symmetric key
692 encryption and decryption. This driver interfaces with AES hw
694 for AES algorithms.
746 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
748 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.