212  *			(EPP) or energy performance bias (EPB),
214  * @epp_policy:		Last saved policy used to set EPP/EPB
590 	s16 epp;  in intel_pstate_get_epp()  local
595 		 * MSR_HWP_REQUEST, so need to read and get EPP.  in intel_pstate_get_epp()
598 			epp = rdmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST,  in intel_pstate_get_epp()
600 			if (epp)  in intel_pstate_get_epp()
601 				return epp;  in intel_pstate_get_epp()
603 		epp = (hwp_req_data >> 24) & 0xff;  in intel_pstate_get_epp()
605 		/* When there is no EPP present, HWP uses EPB settings */  in intel_pstate_get_epp()
606 		epp = intel_pstate_get_epb(cpu_data);  in intel_pstate_get_epp()
609 	return epp;  in intel_pstate_get_epp()
631  * EPP/EPB display strings corresponding to EPP index in the
668 	s16 epp;  in intel_pstate_get_energy_pref_index()  local
672 	epp = intel_pstate_get_epp(cpu_data, 0);  in intel_pstate_get_energy_pref_index()
673 	if (epp < 0)  in intel_pstate_get_energy_pref_index()
674 		return epp;  in intel_pstate_get_energy_pref_index()
677 		if (epp == epp_values[EPP_INDEX_PERFORMANCE])  in intel_pstate_get_energy_pref_index()
679 		if (epp == epp_values[EPP_INDEX_BALANCE_PERFORMANCE])  in intel_pstate_get_energy_pref_index()
681 		if (epp == epp_values[EPP_INDEX_BALANCE_POWERSAVE])  in intel_pstate_get_energy_pref_index()
683 		if (epp == epp_values[EPP_INDEX_POWERSAVE])  in intel_pstate_get_energy_pref_index()
685 		*raw_epp = epp;  in intel_pstate_get_energy_pref_index()
698 		index = (epp >> 2) + 1;  in intel_pstate_get_energy_pref_index()
704 static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)  in intel_pstate_set_epp()  argument
716 	value |= (u64)epp << 24;  in intel_pstate_set_epp()
725 		cpu->epp_cached = epp;  in intel_pstate_set_epp()
734 	int epp = -EINVAL;  in intel_pstate_set_energy_pref_index()  local
738 		epp = cpu_data->epp_default;  in intel_pstate_set_energy_pref_index()
742 			epp = raw_epp;  in intel_pstate_set_energy_pref_index()
743 		else if (epp == -EINVAL)  in intel_pstate_set_energy_pref_index()
744 			epp = epp_values[pref_index];  in intel_pstate_set_energy_pref_index()
747 		 * To avoid confusion, refuse to set EPP to any values different  in intel_pstate_set_energy_pref_index()
751 		if (epp > 0 && cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE)  in intel_pstate_set_energy_pref_index()
754 		ret = intel_pstate_set_epp(cpu_data, epp);  in intel_pstate_set_energy_pref_index()
756 		if (epp == -EINVAL)  in intel_pstate_set_energy_pref_index()
757 			epp = (pref_index - 1) << 2;  in intel_pstate_set_energy_pref_index()
758 		ret = intel_pstate_set_epb(cpu_data->cpu, epp);  in intel_pstate_set_energy_pref_index()
789 	u32 epp = 0;  in store_energy_performance_preference()  local
800 		ret = kstrtouint(buf, 10, &epp);  in store_energy_performance_preference()
804 		if (epp > 255)  in store_energy_performance_preference()
821 		ret = intel_pstate_set_energy_pref_index(cpu, ret, raw, epp);  in store_energy_performance_preference()
825 		 * target CPU before the EPP update and restarted after it,  in store_energy_performance_preference()
830 			epp = ret ? epp_values[ret] : cpu->epp_default;  in store_energy_performance_preference()
832 		if (cpu->epp_cached != epp) {  in store_energy_performance_preference()
836 			ret = intel_pstate_set_epp(cpu, epp);  in store_energy_performance_preference()
928 	s16 epp;  in intel_pstate_hwp_set()  local
950 		epp = intel_pstate_get_epp(cpu_data, value);  in intel_pstate_hwp_set()
951 		cpu_data->epp_powersave = epp;  in intel_pstate_hwp_set()
952 		/* If EPP read was failed, then don't try to write */  in intel_pstate_hwp_set()
953 		if (epp < 0)  in intel_pstate_hwp_set()
956 		epp = 0;  in intel_pstate_hwp_set()
958 		/* skip setting EPP, when saved value is invalid */  in intel_pstate_hwp_set()
963 		 * No need to restore EPP when it is not zero. This  in intel_pstate_hwp_set()
969 		epp = intel_pstate_get_epp(cpu_data, value);  in intel_pstate_hwp_set()
970 		if (epp)  in intel_pstate_hwp_set()
973 		epp = cpu_data->epp_powersave;  in intel_pstate_hwp_set()
977 		value |= (u64)epp << 24;  in intel_pstate_hwp_set()
979 		intel_pstate_set_epb(cpu, epp);  in intel_pstate_hwp_set()
997 		 * In case the EPP has been set to "performance" by the  in intel_pstate_hwp_offline()
999 		 * temporary value with the cached EPP one.  in intel_pstate_hwp_offline()
1004 		 * However, make sure that EPP will be set to "performance" when  in intel_pstate_hwp_offline()
1026 	/* Set EPP to min */  in intel_pstate_hwp_offline()
1676 	 * EPP return.  in intel_pstate_update_epp_defaults()
1682 	 * If powerup EPP is something other than chipset default 0x80 and  in intel_pstate_update_epp_defaults()
1683 	 * - is more performance oriented than 0x80 (default balance_perf EPP)  in intel_pstate_update_epp_defaults()
1684 	 * - But less performance oriented than performance EPP  in intel_pstate_update_epp_defaults()
1685 	 *   then use this as new balance_perf EPP.  in intel_pstate_update_epp_defaults()
1695 	 * and default EPP.  in intel_pstate_update_epp_defaults()
3368 	 * Set EPP value as 102, this is the max suggested EPP
3396 		 * Avoid enabling HWP for processors without EPP support,  in intel_pstate_init()