Lines Matching +full:out +full:- +full:masks
1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 2002-2004 Sensoray Co., Inc.
24 * Number of extended-capability
36 #define S626_RANGE_5V 0x10 /* +/-5V range */
37 #define S626_RANGE_10V 0x00 /* +/-10V range */
53 #define S626_ERR_DEBI_TIMEOUT 0x00400000 /* DEBI transfer timed out. */
146 * GPIO3 = IRQ; GPIO1 = out.
180 * Shut down all MC1-controlled
189 #define S626_MC1_A2OUT 0x0008 /* Enab/disable transfer on A2 out. */
231 #define S626_P_RPS0_TOUT 0x00D4 /* RPS0 time-out. */
232 #define S626_P_RPS1_TOUT 0x00D8 /* RPS1 time-out. */
234 #define S626_P_GPIO 0x00E0 /* General-purpose I/O. */
286 /* Bit masks for MISC1 register that are the same for reads and writes. */
301 /* Bit masks for MISC1 register reads. */
302 #define S626_RDMISC1_WDTIMEOUT 0x4000 /* Watchdog timer timed out. */
304 /* Bit masks for MISC2 register writes. */
308 /* Bit masks for MISC2 register that are the same for reads and writes. */
313 /* Bit masks for ACON1 register. */
316 #define S626_A1_SWAP 0x00200000 /* Use big-endian for A1. */
317 #define S626_A2_SWAP 0x00100000 /* Use big-endian for A2. */
320 * WS1-WS4 = CS* outputs.
341 /* Bit masks for ACON2 register. */
359 * active-low bits.
366 /* Bit masks for timeslot records. */
385 /* Select parallel-to-serial converter's data source: */
409 #define S626_XSD2 0x00000008 /* Shift data out on SD2. */
414 * then tri-state.
478 /* 4-bit field that specifies DEBI timeout value in PCI clock cycles: */
484 /* 2-bit field that specifies Endian byte lane steering: */
486 * Straight - don't swap any
489 #define S626_DEBI_CFG_SWAP_2 0x00100000 /* 2-byte swap (Motorola). */
490 #define S626_DEBI_CFG_SWAP_4 0x00200000 /* 4-byte swap. */
493 * 16-bit cycles.
516 * before timing out.
596 /* Sanity-check limits for parameters. */
612 #define S626_MAKE(x, w, p) (((x) & ((1 << (w)) - 1)) << (p))
613 #define S626_UNMAKE(v, w, p) (((v) >> (p)) & ((1 << (w)) - 1))
637 /* Bit field masks for CRA: */
692 #define S626_CRBBIT_OVERDO_A 14 /* (r) A overflow routed to dig. out. */
694 #define S626_CRBBIT_OVERDO_B 13 /* (r) B overflow routed to dig. out. */
722 /* Bit field masks for CRB: */
818 /* Bit field masks for standardized SETUP structure: */