Lines Matching +full:gpio1 +full:- +full:polarity +full:- +full:invert

1 /* SPDX-License-Identifier: GPL-2.0+ */
6  * COMEDI - Linux Control and Measurement Device Interface
10  * Copyright (C) 2002-2004 Sensoray Co., Inc.
24 					 * Number of extended-capability
36 #define S626_RANGE_5V		0x10	/* +/-5V range */
37 #define S626_RANGE_10V		0x00	/* +/-10V range */
146 						 * GPIO3 = IRQ; GPIO1 = out.
148 #define S626_GPIO1_LO		0x00000000	/* GPIO1 set to LOW. */
149 #define S626_GPIO1_HI		0x00001000	/* GPIO1 set to HIGH. */
180 						 * Shut down all MC1-controlled
231 #define S626_P_RPS0_TOUT	0x00D4	/* RPS0 time-out. */
232 #define S626_P_RPS1_TOUT	0x00D8	/* RPS1 time-out. */
234 #define S626_P_GPIO		0x00E0	/* General-purpose I/O. */
258 #define S626_LP_DACPOL		0x0082	/* Write DAC polarity. */
316 #define S626_A1_SWAP		0x00200000	/* Use big-endian for A1. */
317 #define S626_A2_SWAP		0x00100000	/* Use big-endian for A2. */
320 						 * WS1-WS4 = CS* outputs.
355 #define S626_INVERT_BCLK2	0x00100000	/* Invert BCLK2 (DACs). */
359 						 * active-low bits.
385 /* Select parallel-to-serial converter's data source: */
414 						 * then tri-state.
478 /* 4-bit field that specifies DEBI timeout value in PCI clock cycles: */
484 /* 2-bit field that specifies Endian byte lane steering: */
486 						 * Straight - don't swap any
489 #define S626_DEBI_CFG_SWAP_2	0x00100000	/* 2-byte swap (Motorola). */
490 #define S626_DEBI_CFG_SWAP_4	0x00200000	/* 4-byte swap. */
493 						 * 16-bit cycles.
596 /* Sanity-check limits for parameters. */
612 #define S626_MAKE(x, w, p)	(((x) & ((1 << (w)) - 1)) << (p))
613 #define S626_UNMAKE(v, w, p)	(((v) >> (p)) & ((1 << (w)) - 1))
618 #define S626_CRABIT_INDXPOL_A	11	/* A index polarity. */
622 #define S626_CRABIT_CLKPOL_A	 4	/* A clock polarity. */
702 #define S626_CRBBIT_INDXPOL_B	 1	/* B index polarity. */
703 #define S626_CRBBIT_CLKPOL_B	 0	/* B clock polarity. */