Lines Matching full:gclk
53 * @gclk: PIT64B's generic clock
59 struct clk *gclk; member
136 clk_disable_unprepare(timer->gclk); in mchp_pit64b_suspend()
144 clk_prepare_enable(timer->gclk); in mchp_pit64b_resume()
253 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
254 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
255 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
258 * This function, first tries to use GCLK by requesting the desired rate from
260 * requested rate. If PCLK/GCLK < 3 (condition requested by PIT64B hardware)
270 * | |-->gclk -->|-->| | +---------+ +-----+ |
279 * - gclk rate <= pclk rate/3
280 * - gclk rate could be requested from PMC
296 /* Try using GCLK. */ in mchp_pit64b_init_mode()
297 gclk_round = clk_round_rate(timer->gclk, max_rate); in mchp_pit64b_init_mode()
310 clk_set_rate(timer->gclk, gclk_round); in mchp_pit64b_init_mode()
323 /* Use GCLK. */ in mchp_pit64b_init_mode()
325 clk_set_rate(timer->gclk, gclk_round); in mchp_pit64b_init_mode()
332 timer->mode & MCHP_PIT64B_MR_SGCLK ? "gclk" : "pclk", best_pres, in mchp_pit64b_init_mode()
356 cs->timer.gclk = timer->gclk; in mchp_pit64b_init_clksrc()
396 ce->timer.gclk = timer->gclk; in mchp_pit64b_init_clkevt()
434 timer.gclk = of_clk_get_by_name(node, "gclk"); in mchp_pit64b_dt_init_timer()
435 if (IS_ERR(timer.gclk)) in mchp_pit64b_dt_init_timer()
436 return PTR_ERR(timer.gclk); in mchp_pit64b_dt_init_timer()
456 clk_rate = clk_get_rate(timer.gclk); in mchp_pit64b_dt_init_timer()