Lines Matching +full:one +full:- +full:timer +full:- +full:only
1 // SPDX-License-Identifier: GPL-2.0-only
19 #define DRV_NAME "cs5535-clockevt"
26 * We are using the 32.768kHz input clock - it's the only one that has the
53 * as clock event sources - not as good as a HPET or APIC, but certainly
55 * a simplified one designed specifically to act as a clock event source.
59 static void disable_timer(struct cs5535_mfgpt_timer *timer) in disable_timer() argument
62 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, in disable_timer()
67 static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta) in start_timer() argument
69 cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta); in start_timer()
70 cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0); in start_timer()
72 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, in start_timer()
137 struct cs5535_mfgpt_timer *timer; in cs5535_mfgpt_init() local
141 timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING); in cs5535_mfgpt_init()
142 if (!timer) { in cs5535_mfgpt_init()
143 printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\n"); in cs5535_mfgpt_init()
144 return -ENODEV; in cs5535_mfgpt_init()
146 cs5535_event_clock = timer; in cs5535_mfgpt_init()
149 if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) { in cs5535_mfgpt_init()
156 ret = request_irq(timer_irq, mfgpt_tick, flags, DRV_NAME, timer); in cs5535_mfgpt_init()
169 ": Registering MFGPT timer as a clock event, using IRQ %d\n", in cs5535_mfgpt_init()
181 return -EIO; in cs5535_mfgpt_init()