239  * @m: DPLL multiplier to set
247 static void _lookup_dco(struct clk_hw_omap *clk, u8 *dco, u16 m, u8 n)  in _lookup_dco()  argument
252 	fint = (clkinp / n) * m;  in _lookup_dco()
264  * @m: DPLL multiplier to set
272 static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)  in _lookup_sddiv()  argument
280 	 * target sigma-delta to near 250MHz  in _lookup_sddiv()
281 	 * sd = ceil[(m/(n+1)) * (clkinp_MHz / 250)]  in _lookup_sddiv()
284 	mod1 = (clkinp * m) % (250 * n);  in _lookup_sddiv()
285 	sd = (clkinp * m) / (250 * n);  in _lookup_sddiv()
377  * omap3_noncore_dpll_program - set non-core DPLL M,N values directly
381  * Program the DPLL with the last M, N values calculated, and wait for
436 	 * transition to a low power state while changing M/N values.  in omap3_noncore_dpll_program()
438 	 * before doing the M/N re-program.  in omap3_noncore_dpll_program()
582  * locked, calculates the M,N values for the DPLL via round-rate.
870  * omap3_core_dpll_save_context - Save the m and n values of the divider
873  * Before the dpll registers are lost save the last rounded rate m and n
899  * omap3_core_dpll_restore_context - restore the m and n values of the divider
902  * Restore the last rounded rate m and n
931  * omap3_non_core_dpll_save_context - Save the m and n values of the divider
934  * Before the dpll registers are lost save the last rounded rate m and n
960  * omap3_core_dpll_restore_context - restore the m and n values of the divider
963  * Restore the last rounded rate m and n
1055 		unsigned int rate, m, n;  in omap3_dpll5_apply_errata()  member
1087 	/* Update the M, N and rounded rate values and program the DPLL. */  in omap3_dpll5_apply_errata()
1089 	dd->last_rounded_m = d->m;  in omap3_dpll5_apply_errata()
1091 	dd->last_rounded_rate = div_u64((u64)parent_rate * d->m, d->n);  in omap3_dpll5_apply_errata()