Lines Matching +full:enable +full:- +full:frequency +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Tero Kristo (t-kristo@ti.com)
12 #include <linux/clk-provider.h>
24 * In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported
26 * at an offset of 4 from ICK enable bit.
36 * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI
39 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
42 * The OMAP3430ES2 SSI target CM_IDLEST bit is at a different shift
51 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_ssi_find_idlest()
52 idlest_reg->offset &= ~0xf0; in omap3430es2_clk_ssi_find_idlest()
53 idlest_reg->offset |= 0x20; in omap3430es2_clk_ssi_find_idlest()
66 * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST
69 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
84 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_dss_usbhost_find_idlest()
86 idlest_reg->offset &= ~0xf0; in omap3430es2_clk_dss_usbhost_find_idlest()
87 idlest_reg->offset |= 0x20; in omap3430es2_clk_dss_usbhost_find_idlest()
88 /* USBHOST_IDLE has same shift */ in omap3430es2_clk_dss_usbhost_find_idlest()
106 * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB
109 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
113 * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via
122 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_hsotgusb_find_idlest()
123 idlest_reg->offset &= ~0xf0; in omap3430es2_clk_hsotgusb_find_idlest()
124 idlest_reg->offset |= 0x20; in omap3430es2_clk_hsotgusb_find_idlest()
137 * am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS
140 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
144 * in the enable register itsel at a bit offset of 4 from the enable
152 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in am35xx_clk_find_idlest()
153 *idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET; in am35xx_clk_find_idlest()
158 * am35xx_clk_find_companion - find companion clock to @clk
161 * @other_bit: u8 ** to return the companion clock bit shift in
168 * associate this type of code with per-module data structures to
175 memcpy(other_reg, &clk->enable_reg, sizeof(*other_reg)); in am35xx_clk_find_companion()
176 if (clk->enable_bit & AM35XX_IPSS_ICK_MASK) in am35xx_clk_find_companion()
177 *other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET; in am35xx_clk_find_companion()
179 *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; in am35xx_clk_find_companion()
188 * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS
191 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
194 * The IPSS target CM_IDLEST bit is at a different shift from the
203 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in am35xx_clk_ipss_find_idlest()
205 idlest_reg->offset &= ~0xf0; in am35xx_clk_ipss_find_idlest()
206 idlest_reg->offset |= 0x20; in am35xx_clk_ipss_find_idlest()
270 * omap3_clk_lock_dpll5 - locks DPLL5
272 * Locks DPLL5 to a pre-defined frequency. This is required for proper
284 * host clock rate, its .set_rate handler() will detect that frequency in omap3_clk_lock_dpll5()