Lines Matching +full:mali +full:- +full:400
1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-spear13xx/spear1340_clock.c
168 {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */
176 /* vco-pll4 rate configuration table, in ascending order of rates */
180 {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */
191 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
203 * 250, 332, 400 or 500 MHz considering different possibilites of input
206 * --------------------------------------------------------------------
208 * --------------------------------------------------------------------
209 * 400 200 100 0x04000
210 * 400 250 125 0x03333
211 * 400 332 166 0x0268D
212 * 400 400 200 0x02000
213 * --------------------------------------------------------------------
217 * 500 400 200 0x02800
219 * --------------------------------------------------------------------
223 * 600 400 200 0x03000
225 * --------------------------------------------------------------------
229 * 664 400 200 0x0351E
231 * --------------------------------------------------------------------
235 * 800 400 200 0x04000
237 * --------------------------------------------------------------------
461 clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0, in spear1340_clk_init()
467 /* vco-pll */ in spear1340_clk_init()
878 clk_register_clkdev(clk, NULL, "b2400000.i2s-play"); in spear1340_clk_init()
883 clk_register_clkdev(clk, NULL, "b2000000.i2s-rec"); in spear1340_clk_init()
928 clk_register_clkdev(clk, NULL, "mali"); in spear1340_clk_init()
950 clk_register_clkdev(clk, NULL, "d0000000.spdif-out"); in spear1340_clk_init()
962 clk_register_clkdev(clk, NULL, "d0100000.spdif-in"); in spear1340_clk_init()