Lines Matching +full:clk +full:- +full:div
1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-spear13xx/spear1340_clock.c
12 #include <linux/clk/spear.h>
17 #include "clk.h"
176 /* vco-pll4 rate configuration table, in ascending order of rates */
189 {.div = 0x073A8}, /* for vco1div2 = 600 MHz */
190 {.div = 0x06062}, /* for vco1div2 = 500 MHz */
191 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
192 {.div = 0x04000}, /* for vco1div2 = 332 MHz */
193 {.div = 0x03031}, /* for vco1div2 = 250 MHz */
194 {.div = 0x0268D}, /* for vco1div2 = 200 MHz */
206 * --------------------------------------------------------------------
207 * vco1div2(Mhz) fout(Mhz) cpuclk = fout/2 div
208 * --------------------------------------------------------------------
213 * --------------------------------------------------------------------
219 * --------------------------------------------------------------------
225 * --------------------------------------------------------------------
231 * --------------------------------------------------------------------
237 * --------------------------------------------------------------------
241 {.div = 0x08000},
242 {.div = 0x06a38},
243 {.div = 0x06666},
244 {.div = 0x06000},
245 {.div = 0x054FD},
246 {.div = 0x05000},
247 {.div = 0x04D18},
248 {.div = 0x04CCE},
249 {.div = 0x04000},
250 {.div = 0x039D5},
251 {.div = 0x0351E},
252 {.div = 0x03333},
253 {.div = 0x03031},
254 {.div = 0x03000},
255 {.div = 0x02A7E},
256 {.div = 0x02800},
257 {.div = 0x0268D},
258 {.div = 0x02666},
259 {.div = 0x02000},
292 /* For gmac phy input clk */
301 {.div = 0x18000}, /* 25 Mhz , for vc01div4 = 300 MHz*/
302 {.div = 0x1638E}, /* 27 Mhz , for vc01div4 = 300 MHz*/
303 {.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/
304 {.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/
305 {.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */
306 {.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */
307 {.div = 0x0A584}, /* 58 Mhz , for vco1div4 = 300 MHz */
308 {.div = 0x093B1}, /* 65 Mhz , for vc01div4 = 300 MHz*/
309 {.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/
310 {.div = 0x081BA}, /* 74 Mhz , for vc01div4 = 300 MHz*/
311 {.div = 0x07BA0}, /* 65 Mhz , for vc01div4 = 250 MHz*/
312 {.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/
313 {.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */
314 {.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/
315 {.div = 0x058E3}, /* 108 Mhz , for vc01div4 = 300 MHz*/
316 {.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/
317 {.div = 0x040A5}, /* 148.5 Mhz , for vc01div4 = 300 MHz*/
318 {.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/
319 {.div = 0x0360D}, /* 148 Mhz , for vc01div4 = 250 MHz*/
320 {.div = 0x035E0}, /* 148.5 MHz, for vc01div4 = 250 MHz*/
350 /* For parent clk = 49.152 MHz */
357 * with parent clk = 49.152, freq gen is 8.192 MHz, smp freq = 32Khz
358 * with parent clk = 12.288, freq gen is 2.048 MHz, smp freq = 8Khz
362 /* For parent clk = 49.152 MHz */
386 {.div = 0x1A92B}, /* 22.5792 MHz for vco1div4=300 MHz*/
387 {.div = 0x186A0}, /* 24.576 MHz for vco1div4=300 MHz*/
388 {.div = 0x18000}, /* 25 MHz for vco1div4=300 MHz*/
389 {.div = 0x1624E}, /* 22.5792 MHz for vco1div4=250 MHz*/
390 {.div = 0x14585}, /* 24.576 MHz for vco1div4=250 MHz*/
391 {.div = 0x14000}, /* 25 MHz for vco1div4=250 MHz*/
392 {.div = 0x0D495}, /* 45.1584 MHz for vco1div4=300 MHz*/
393 {.div = 0x0C000}, /* 50 MHz for vco1div4=300 MHz*/
394 {.div = 0x0B127}, /* 45.1584 MHz for vco1div4=250 MHz*/
395 {.div = 0x0A000}, /* 50 MHz for vco1div4=250 MHz*/
396 {.div = 0x07530}, /* 81.92 MHz for vco1div4=300 MHz*/
397 {.div = 0x061A8}, /* 81.92 MHz for vco1div4=250 MHz*/
398 {.div = 0x06000}, /* 100 MHz for vco1div4=300 MHz*/
399 {.div = 0x05000}, /* 100 MHz for vco1div4=250 MHz*/
400 {.div = 0x03000}, /* 200 MHz for vco1div4=300 MHz*/
401 {.div = 0x02DB6}, /* 210 MHz for vco1div4=300 MHz*/
402 {.div = 0x02BA2}, /* 220 MHz for vco1div4=300 MHz*/
403 {.div = 0x029BD}, /* 230 MHz for vco1div4=300 MHz*/
404 {.div = 0x02800}, /* 200 MHz for vco1div4=250 MHz*/
405 {.div = 0x02666}, /* 250 MHz for vco1div4=300 MHz*/
406 {.div = 0x02620}, /* 210 MHz for vco1div4=250 MHz*/
407 {.div = 0x02460}, /* 220 MHz for vco1div4=250 MHz*/
408 {.div = 0x022C0}, /* 230 MHz for vco1div4=250 MHz*/
409 {.div = 0x02160}, /* 240 MHz for vco1div4=250 MHz*/
410 {.div = 0x02000}, /* 250 MHz for vco1div4=250 MHz*/
442 struct clk *clk, *clk1; in spear1340_clk_init() local
444 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000); in spear1340_clk_init()
445 clk_register_clkdev(clk, "osc_32k_clk", NULL); in spear1340_clk_init()
447 clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000); in spear1340_clk_init()
448 clk_register_clkdev(clk, "osc_24m_clk", NULL); in spear1340_clk_init()
450 clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000); in spear1340_clk_init()
451 clk_register_clkdev(clk, "osc_25m_clk", NULL); in spear1340_clk_init()
453 clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000); in spear1340_clk_init()
454 clk_register_clkdev(clk, "gmii_pad_clk", NULL); in spear1340_clk_init()
456 clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0, in spear1340_clk_init()
458 clk_register_clkdev(clk, "i2s_src_pad_clk", NULL); in spear1340_clk_init()
460 /* clock derived from 32 KHz osc clk */ in spear1340_clk_init()
461 clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0, in spear1340_clk_init()
464 clk_register_clkdev(clk, NULL, "e0580000.rtc"); in spear1340_clk_init()
466 /* clock derived from 24 or 25 MHz osc clk */ in spear1340_clk_init()
467 /* vco-pll */ in spear1340_clk_init()
468 clk = clk_register_mux(NULL, "vco1_mclk", vco_parents, in spear1340_clk_init()
472 clk_register_clkdev(clk, "vco1_mclk", NULL); in spear1340_clk_init()
473 clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk", 0, in spear1340_clk_init()
476 clk_register_clkdev(clk, "vco1_clk", NULL); in spear1340_clk_init()
479 clk = clk_register_mux(NULL, "vco2_mclk", vco_parents, in spear1340_clk_init()
483 clk_register_clkdev(clk, "vco2_mclk", NULL); in spear1340_clk_init()
484 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", 0, in spear1340_clk_init()
487 clk_register_clkdev(clk, "vco2_clk", NULL); in spear1340_clk_init()
490 clk = clk_register_mux(NULL, "vco3_mclk", vco_parents, in spear1340_clk_init()
494 clk_register_clkdev(clk, "vco3_mclk", NULL); in spear1340_clk_init()
495 clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk", 0, in spear1340_clk_init()
498 clk_register_clkdev(clk, "vco3_clk", NULL); in spear1340_clk_init()
501 clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk", in spear1340_clk_init()
504 clk_register_clkdev(clk, "vco4_clk", NULL); in spear1340_clk_init()
507 clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0, in spear1340_clk_init()
509 clk_register_clkdev(clk, "pll5_clk", NULL); in spear1340_clk_init()
511 clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0, in spear1340_clk_init()
513 clk_register_clkdev(clk, "pll6_clk", NULL); in spear1340_clk_init()
515 /* vco div n clocks */ in spear1340_clk_init()
516 clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1, in spear1340_clk_init()
518 clk_register_clkdev(clk, "vco1div2_clk", NULL); in spear1340_clk_init()
520 clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1, in spear1340_clk_init()
522 clk_register_clkdev(clk, "vco1div4_clk", NULL); in spear1340_clk_init()
524 clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1, in spear1340_clk_init()
526 clk_register_clkdev(clk, "vco2div2_clk", NULL); in spear1340_clk_init()
528 clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1, in spear1340_clk_init()
530 clk_register_clkdev(clk, "vco3div2_clk", NULL); in spear1340_clk_init()
535 clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0, in spear1340_clk_init()
538 clk_register_clkdev(clk, NULL, "e07008c4.thermal"); in spear1340_clk_init()
540 /* clock derived from pll4 clk */ in spear1340_clk_init()
541 clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1, in spear1340_clk_init()
543 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1340_clk_init()
545 /* clock derived from pll1 clk */ in spear1340_clk_init()
546 clk = clk_register_frac("sys_syn_clk", "vco1div2_clk", 0, in spear1340_clk_init()
549 clk_register_clkdev(clk, "sys_syn_clk", NULL); in spear1340_clk_init()
551 clk = clk_register_frac("amba_syn_clk", "vco1div2_clk", 0, in spear1340_clk_init()
554 clk_register_clkdev(clk, "amba_syn_clk", NULL); in spear1340_clk_init()
556 clk = clk_register_mux(NULL, "sys_mclk", sys_parents, in spear1340_clk_init()
560 clk_register_clkdev(clk, "sys_mclk", NULL); in spear1340_clk_init()
562 clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1, in spear1340_clk_init()
564 clk_register_clkdev(clk, "cpu_clk", NULL); in spear1340_clk_init()
566 clk = clk_register_fixed_factor(NULL, "cpu_div3_clk", "cpu_clk", 0, 1, in spear1340_clk_init()
568 clk_register_clkdev(clk, "cpu_div3_clk", NULL); in spear1340_clk_init()
570 clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1, in spear1340_clk_init()
572 clk_register_clkdev(clk, NULL, "ec800620.wdt"); in spear1340_clk_init()
574 clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1, in spear1340_clk_init()
576 clk_register_clkdev(clk, NULL, "smp_twd"); in spear1340_clk_init()
578 clk = clk_register_mux(NULL, "ahb_clk", ahb_parents, in spear1340_clk_init()
582 clk_register_clkdev(clk, "ahb_clk", NULL); in spear1340_clk_init()
584 clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, in spear1340_clk_init()
586 clk_register_clkdev(clk, "apb_clk", NULL); in spear1340_clk_init()
589 clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents, in spear1340_clk_init()
593 clk_register_clkdev(clk, "gpt0_mclk", NULL); in spear1340_clk_init()
594 clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0, in spear1340_clk_init()
597 clk_register_clkdev(clk, NULL, "gpt0"); in spear1340_clk_init()
599 clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents, in spear1340_clk_init()
603 clk_register_clkdev(clk, "gpt1_mclk", NULL); in spear1340_clk_init()
604 clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0, in spear1340_clk_init()
607 clk_register_clkdev(clk, NULL, "gpt1"); in spear1340_clk_init()
609 clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents, in spear1340_clk_init()
613 clk_register_clkdev(clk, "gpt2_mclk", NULL); in spear1340_clk_init()
614 clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0, in spear1340_clk_init()
617 clk_register_clkdev(clk, NULL, "gpt2"); in spear1340_clk_init()
619 clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents, in spear1340_clk_init()
623 clk_register_clkdev(clk, "gpt3_mclk", NULL); in spear1340_clk_init()
624 clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0, in spear1340_clk_init()
627 clk_register_clkdev(clk, NULL, "gpt3"); in spear1340_clk_init()
630 clk = clk_register_aux("uart0_syn_clk", "uart0_syn_gclk", in spear1340_clk_init()
633 clk_register_clkdev(clk, "uart0_syn_clk", NULL); in spear1340_clk_init()
636 clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, in spear1340_clk_init()
641 clk_register_clkdev(clk, "uart0_mclk", NULL); in spear1340_clk_init()
643 clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", in spear1340_clk_init()
646 clk_register_clkdev(clk, NULL, "e0000000.serial"); in spear1340_clk_init()
648 clk = clk_register_aux("uart1_syn_clk", "uart1_syn_gclk", in spear1340_clk_init()
651 clk_register_clkdev(clk, "uart1_syn_clk", NULL); in spear1340_clk_init()
654 clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents, in spear1340_clk_init()
658 clk_register_clkdev(clk, "uart1_mclk", NULL); in spear1340_clk_init()
660 clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0, in spear1340_clk_init()
663 clk_register_clkdev(clk, NULL, "b4100000.serial"); in spear1340_clk_init()
665 clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk", in spear1340_clk_init()
668 clk_register_clkdev(clk, "sdhci_syn_clk", NULL); in spear1340_clk_init()
671 clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", in spear1340_clk_init()
674 clk_register_clkdev(clk, NULL, "b3000000.sdhci"); in spear1340_clk_init()
676 clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk", in spear1340_clk_init()
679 clk_register_clkdev(clk, "cfxd_syn_clk", NULL); in spear1340_clk_init()
682 clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", in spear1340_clk_init()
685 clk_register_clkdev(clk, NULL, "b2800000.cf"); in spear1340_clk_init()
686 clk_register_clkdev(clk, NULL, "arasan_xd"); in spear1340_clk_init()
688 clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk", 0, in spear1340_clk_init()
691 clk_register_clkdev(clk, "c3_syn_clk", NULL); in spear1340_clk_init()
694 clk = clk_register_mux(NULL, "c3_mclk", c3_parents, in spear1340_clk_init()
699 clk_register_clkdev(clk, "c3_mclk", NULL); in spear1340_clk_init()
701 clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", CLK_SET_RATE_PARENT, in spear1340_clk_init()
704 clk_register_clkdev(clk, NULL, "e1800000.c3"); in spear1340_clk_init()
707 clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents, in spear1340_clk_init()
712 clk_register_clkdev(clk, "phy_input_mclk", NULL); in spear1340_clk_init()
714 clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk", in spear1340_clk_init()
717 clk_register_clkdev(clk, "phy_syn_clk", NULL); in spear1340_clk_init()
720 clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents, in spear1340_clk_init()
724 clk_register_clkdev(clk, "stmmacphy.0", NULL); in spear1340_clk_init()
727 clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents, in spear1340_clk_init()
732 clk_register_clkdev(clk, "clcd_syn_mclk", NULL); in spear1340_clk_init()
734 clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0, in spear1340_clk_init()
737 clk_register_clkdev(clk, "clcd_syn_clk", NULL); in spear1340_clk_init()
739 clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents, in spear1340_clk_init()
744 clk_register_clkdev(clk, "clcd_pixel_mclk", NULL); in spear1340_clk_init()
746 clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0, in spear1340_clk_init()
749 clk_register_clkdev(clk, NULL, "e1000000.clcd"); in spear1340_clk_init()
752 clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents, in spear1340_clk_init()
756 clk_register_clkdev(clk, "i2s_src_mclk", NULL); in spear1340_clk_init()
758 clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", in spear1340_clk_init()
762 clk_register_clkdev(clk, "i2s_prs1_clk", NULL); in spear1340_clk_init()
764 clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents, in spear1340_clk_init()
769 clk_register_clkdev(clk, "i2s_ref_mclk", NULL); in spear1340_clk_init()
771 clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0, in spear1340_clk_init()
774 clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL); in spear1340_clk_init()
776 clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk", "i2s_ref_mclk", in spear1340_clk_init()
780 clk_register_clkdev(clk, "i2s_sclk_clk", NULL); in spear1340_clk_init()
783 /* clock derived from ahb clk */ in spear1340_clk_init()
784 clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, in spear1340_clk_init()
787 clk_register_clkdev(clk, NULL, "e0280000.i2c"); in spear1340_clk_init()
789 clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0, in spear1340_clk_init()
792 clk_register_clkdev(clk, NULL, "b4000000.i2c"); in spear1340_clk_init()
794 clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, in spear1340_clk_init()
797 clk_register_clkdev(clk, NULL, "ea800000.dma"); in spear1340_clk_init()
798 clk_register_clkdev(clk, NULL, "eb000000.dma"); in spear1340_clk_init()
800 clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, in spear1340_clk_init()
803 clk_register_clkdev(clk, NULL, "e2000000.eth"); in spear1340_clk_init()
805 clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, in spear1340_clk_init()
808 clk_register_clkdev(clk, NULL, "b0000000.flash"); in spear1340_clk_init()
810 clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, in spear1340_clk_init()
813 clk_register_clkdev(clk, NULL, "ea000000.flash"); in spear1340_clk_init()
815 clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0, in spear1340_clk_init()
818 clk_register_clkdev(clk, NULL, "e4000000.ohci"); in spear1340_clk_init()
819 clk_register_clkdev(clk, NULL, "e4800000.ehci"); in spear1340_clk_init()
821 clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0, in spear1340_clk_init()
824 clk_register_clkdev(clk, NULL, "e5000000.ohci"); in spear1340_clk_init()
825 clk_register_clkdev(clk, NULL, "e5800000.ehci"); in spear1340_clk_init()
827 clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0, in spear1340_clk_init()
830 clk_register_clkdev(clk, NULL, "e3800000.otg"); in spear1340_clk_init()
832 clk = clk_register_gate(NULL, "pcie_sata_clk", "ahb_clk", 0, in spear1340_clk_init()
835 clk_register_clkdev(clk, NULL, "b1000000.pcie"); in spear1340_clk_init()
836 clk_register_clkdev(clk, NULL, "b1000000.ahci"); in spear1340_clk_init()
838 clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0, in spear1340_clk_init()
841 clk_register_clkdev(clk, "sysram0_clk", NULL); in spear1340_clk_init()
843 clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0, in spear1340_clk_init()
846 clk_register_clkdev(clk, "sysram1_clk", NULL); in spear1340_clk_init()
848 clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk", in spear1340_clk_init()
851 clk_register_clkdev(clk, "adc_syn_clk", NULL); in spear1340_clk_init()
854 clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", in spear1340_clk_init()
857 clk_register_clkdev(clk, NULL, "e0080000.adc"); in spear1340_clk_init()
859 /* clock derived from apb clk */ in spear1340_clk_init()
860 clk = clk_register_gate(NULL, "ssp_clk", "apb_clk", 0, in spear1340_clk_init()
863 clk_register_clkdev(clk, NULL, "e0100000.spi"); in spear1340_clk_init()
865 clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, in spear1340_clk_init()
868 clk_register_clkdev(clk, NULL, "e0600000.gpio"); in spear1340_clk_init()
870 clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, in spear1340_clk_init()
873 clk_register_clkdev(clk, NULL, "e0680000.gpio"); in spear1340_clk_init()
875 clk = clk_register_gate(NULL, "i2s_play_clk", "apb_clk", 0, in spear1340_clk_init()
878 clk_register_clkdev(clk, NULL, "b2400000.i2s-play"); in spear1340_clk_init()
880 clk = clk_register_gate(NULL, "i2s_rec_clk", "apb_clk", 0, in spear1340_clk_init()
883 clk_register_clkdev(clk, NULL, "b2000000.i2s-rec"); in spear1340_clk_init()
885 clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0, in spear1340_clk_init()
888 clk_register_clkdev(clk, NULL, "e0300000.kbd"); in spear1340_clk_init()
891 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, in spear1340_clk_init()
896 clk_register_clkdev(clk, "gen_syn0_1_mclk", NULL); in spear1340_clk_init()
898 clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents, in spear1340_clk_init()
903 clk_register_clkdev(clk, "gen_syn2_3_mclk", NULL); in spear1340_clk_init()
905 clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_mclk", 0, in spear1340_clk_init()
908 clk_register_clkdev(clk, "gen_syn0_clk", NULL); in spear1340_clk_init()
910 clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_mclk", 0, in spear1340_clk_init()
913 clk_register_clkdev(clk, "gen_syn1_clk", NULL); in spear1340_clk_init()
915 clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_mclk", 0, in spear1340_clk_init()
918 clk_register_clkdev(clk, "gen_syn2_clk", NULL); in spear1340_clk_init()
920 clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_mclk", 0, in spear1340_clk_init()
923 clk_register_clkdev(clk, "gen_syn3_clk", NULL); in spear1340_clk_init()
925 clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk", in spear1340_clk_init()
928 clk_register_clkdev(clk, NULL, "mali"); in spear1340_clk_init()
930 clk = clk_register_gate(NULL, "cec0_clk", "ahb_clk", 0, in spear1340_clk_init()
933 clk_register_clkdev(clk, NULL, "spear_cec.0"); in spear1340_clk_init()
935 clk = clk_register_gate(NULL, "cec1_clk", "ahb_clk", 0, in spear1340_clk_init()
938 clk_register_clkdev(clk, NULL, "spear_cec.1"); in spear1340_clk_init()
940 clk = clk_register_mux(NULL, "spdif_out_mclk", spdif_out_parents, in spear1340_clk_init()
945 clk_register_clkdev(clk, "spdif_out_mclk", NULL); in spear1340_clk_init()
947 clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk", in spear1340_clk_init()
950 clk_register_clkdev(clk, NULL, "d0000000.spdif-out"); in spear1340_clk_init()
952 clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents, in spear1340_clk_init()
957 clk_register_clkdev(clk, "spdif_in_mclk", NULL); in spear1340_clk_init()
959 clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk", in spear1340_clk_init()
962 clk_register_clkdev(clk, NULL, "d0100000.spdif-in"); in spear1340_clk_init()
964 clk = clk_register_gate(NULL, "acp_clk", "ahb_clk", 0, in spear1340_clk_init()
967 clk_register_clkdev(clk, NULL, "acp_clk"); in spear1340_clk_init()
969 clk = clk_register_gate(NULL, "plgpio_clk", "ahb_clk", 0, in spear1340_clk_init()
972 clk_register_clkdev(clk, NULL, "e2800000.gpio"); in spear1340_clk_init()
974 clk = clk_register_gate(NULL, "video_dec_clk", "ahb_clk", 0, in spear1340_clk_init()
977 clk_register_clkdev(clk, NULL, "video_dec"); in spear1340_clk_init()
979 clk = clk_register_gate(NULL, "video_enc_clk", "ahb_clk", 0, in spear1340_clk_init()
982 clk_register_clkdev(clk, NULL, "video_enc"); in spear1340_clk_init()
984 clk = clk_register_gate(NULL, "video_in_clk", "ahb_clk", 0, in spear1340_clk_init()
987 clk_register_clkdev(clk, NULL, "spear_vip"); in spear1340_clk_init()
989 clk = clk_register_gate(NULL, "cam0_clk", "ahb_clk", 0, in spear1340_clk_init()
992 clk_register_clkdev(clk, NULL, "d0200000.cam0"); in spear1340_clk_init()
994 clk = clk_register_gate(NULL, "cam1_clk", "ahb_clk", 0, in spear1340_clk_init()
997 clk_register_clkdev(clk, NULL, "d0300000.cam1"); in spear1340_clk_init()
999 clk = clk_register_gate(NULL, "cam2_clk", "ahb_clk", 0, in spear1340_clk_init()
1002 clk_register_clkdev(clk, NULL, "d0400000.cam2"); in spear1340_clk_init()
1004 clk = clk_register_gate(NULL, "cam3_clk", "ahb_clk", 0, in spear1340_clk_init()
1007 clk_register_clkdev(clk, NULL, "d0500000.cam3"); in spear1340_clk_init()
1009 clk = clk_register_gate(NULL, "pwm_clk", "ahb_clk", 0, in spear1340_clk_init()
1012 clk_register_clkdev(clk, NULL, "e0180000.pwm"); in spear1340_clk_init()