Lines Matching +full:i2c +full:- +full:gate
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/s3c2443.h>
18 #include "clk-pll.h"
112 GATE(SCLK_HSMMC_EXT, "sclk_hsmmcext", "ext", SCLKCON, 13, 0, 0),
113 GATE(SCLK_HSMMC1, "sclk_hsmmc1", "div_hsmmc1", SCLKCON, 12, 0, 0),
114 GATE(SCLK_FIMD, "sclk_fimd", "div_fimd", SCLKCON, 10, 0, 0),
115 GATE(SCLK_I2S0, "sclk_i2s0", "mux_i2s0", SCLKCON, 9, 0, 0),
116 GATE(SCLK_UART, "sclk_uart", "div_uart", SCLKCON, 8, 0, 0),
117 GATE(SCLK_USBH, "sclk_usbhost", "div_usbhost", SCLKCON, 1, 0, 0),
118 GATE(HCLK_DRAM, "dram", "hclk", HCLKCON, 19, CLK_IGNORE_UNUSED, 0),
119 GATE(HCLK_SSMC, "ssmc", "hclk", HCLKCON, 18, CLK_IGNORE_UNUSED, 0),
120 GATE(HCLK_HSMMC1, "hsmmc1", "hclk", HCLKCON, 16, 0, 0),
121 GATE(HCLK_USBD, "usb-device", "hclk", HCLKCON, 12, 0, 0),
122 GATE(HCLK_USBH, "usb-host", "hclk", HCLKCON, 11, 0, 0),
123 GATE(HCLK_LCD, "lcd", "hclk", HCLKCON, 9, 0, 0),
124 GATE(HCLK_DMA5, "dma5", "hclk", HCLKCON, 5, CLK_IGNORE_UNUSED, 0),
125 GATE(HCLK_DMA4, "dma4", "hclk", HCLKCON, 4, CLK_IGNORE_UNUSED, 0),
126 GATE(HCLK_DMA3, "dma3", "hclk", HCLKCON, 3, CLK_IGNORE_UNUSED, 0),
127 GATE(HCLK_DMA2, "dma2", "hclk", HCLKCON, 2, CLK_IGNORE_UNUSED, 0),
128 GATE(HCLK_DMA1, "dma1", "hclk", HCLKCON, 1, CLK_IGNORE_UNUSED, 0),
129 GATE(HCLK_DMA0, "dma0", "hclk", HCLKCON, 0, CLK_IGNORE_UNUSED, 0),
130 GATE(PCLK_GPIO, "gpio", "pclk", PCLKCON, 13, CLK_IGNORE_UNUSED, 0),
131 GATE(PCLK_RTC, "rtc", "pclk", PCLKCON, 12, 0, 0),
132 GATE(PCLK_WDT, "wdt", "pclk", PCLKCON, 11, 0, 0),
133 GATE(PCLK_PWM, "pwm", "pclk", PCLKCON, 10, 0, 0),
134 GATE(PCLK_I2S0, "i2s0", "pclk", PCLKCON, 9, 0, 0),
135 GATE(PCLK_AC97, "ac97", "pclk", PCLKCON, 8, 0, 0),
136 GATE(PCLK_ADC, "adc", "pclk", PCLKCON, 7, 0, 0),
137 GATE(PCLK_SPI0, "spi0", "pclk", PCLKCON, 6, 0, 0),
138 GATE(PCLK_I2C0, "i2c0", "pclk", PCLKCON, 4, 0, 0),
139 GATE(PCLK_UART3, "uart3", "pclk", PCLKCON, 3, 0, 0),
140 GATE(PCLK_UART2, "uart2", "pclk", PCLKCON, 2, 0, 0),
141 GATE(PCLK_UART1, "uart1", "pclk", PCLKCON, 1, 0, 0),
142 GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0),
152 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
153 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
154 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
155 ALIAS(PCLK_UART3, "s3c2440-uart.3", "uart"),
156 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
157 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
158 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
159 ALIAS(PCLK_UART3, "s3c2440-uart.3", "clk_uart_baud2"),
165 ALIAS(PCLK_I2C0, "s3c2410-i2c.0", "i2c"),
166 ALIAS(HCLK_USBD, NULL, "usb-device"),
167 ALIAS(HCLK_USBH, NULL, "usb-host"),
168 ALIAS(SCLK_USBH, NULL, "usb-bus-host"),
169 ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi"),
170 ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi_busclk0"),
171 ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "hsmmc"),
172 ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.0"),
173 ALIAS(PCLK_I2S0, "samsung-i2s.0", "iis"),
174 ALIAS(SCLK_I2S0, NULL, "i2s-if"),
213 GATE(0, "hsspi0_mpll", "div_hsspi0_mpll", SCLKCON, 19, 0, 0),
214 GATE(0, "hsspi0_epll", "div_hsspi0_epll", SCLKCON, 14, 0, 0),
215 GATE(0, "sclk_hsmmc0", "div_hsmmc0", SCLKCON, 6, 0, 0),
216 GATE(HCLK_2D, "2d", "hclk", HCLKCON, 20, 0, 0),
217 GATE(HCLK_HSMMC0, "hsmmc0", "hclk", HCLKCON, 15, 0, 0),
218 GATE(HCLK_IROM, "irom", "hclk", HCLKCON, 13, CLK_IGNORE_UNUSED, 0),
219 GATE(PCLK_PCM, "pcm", "pclk", PCLKCON, 19, 0, 0),
223 ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"),
224 ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"),
225 ALIAS(MUX_HSMMC0, "s3c-sdhci.0", "mmc_busclk.2"),
226 ALIAS(MUX_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"),
227 ALIAS(MUX_HSSPI0, "s3c2443-spi.0", "spi_busclk2"),
256 GATE(SCLK_HSSPI0, "sclk_hsspi0", "div_hsspi0_epll", SCLKCON, 14, 0, 0),
257 GATE(SCLK_CAM, "sclk_cam", "div_cam", SCLKCON, 11, 0, 0),
258 GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, CLK_IGNORE_UNUSED, 0),
259 GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0),
260 GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 15, 0, 0),
261 GATE(PCLK_SDI, "sdi", "pclk", PCLKCON, 5, 0, 0),
265 ALIAS(SCLK_HSSPI0, "s3c2443-spi.0", "spi_busclk2"),
266 ALIAS(SCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"),
267 ALIAS(SCLK_CAM, NULL, "camif-upll"),
268 ALIAS(PCLK_SPI1, "s3c2410-spi.0", "spi"),
294 GATE(SCLK_I2S1, "sclk_i2s1", "div_i2s1", SCLKCON, 5, 0, 0),
295 GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, 0, 0),
296 GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0),
297 GATE(HCLK_DMA7, "dma7", "hclk", HCLKCON, 7, CLK_IGNORE_UNUSED, 0),
298 GATE(HCLK_DMA6, "dma6", "hclk", HCLKCON, 6, CLK_IGNORE_UNUSED, 0),
299 GATE(PCLK_I2S1, "i2s1", "pclk", PCLKCON, 17, 0, 0),
300 GATE(PCLK_I2C1, "i2c1", "pclk", PCLKCON, 16, 0, 0),
301 GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 14, 0, 0),
305 ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi"),
306 ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi_busclk0"),
307 ALIAS(MUX_HSSPI1, "s3c2443-spi.1", "spi_busclk2"),
308 ALIAS(PCLK_I2C1, "s3c2410-i2c.1", "i2c"),
325 * Only necessary until the devicetree-move is complete
358 /* Register external clocks only in non-dt cases */ in s3c2443_common_clk_init()
380 /* Register SoC-specific clocks. */ in s3c2443_common_clk_init()
426 CLK_OF_DECLARE(s3c2416_clk, "samsung,s3c2416-clock", s3c2416_clk_init);
432 CLK_OF_DECLARE(s3c2443_clk, "samsung,s3c2443-clock", s3c2443_clk_init);
438 CLK_OF_DECLARE(s3c2450_clk, "samsung,s3c2450-clock", s3c2450_clk_init);