Lines Matching refs:pll_clk
1425 const struct samsung_pll_clock *pll_clk, in _samsung_clk_register_pll() argument
1435 __func__, pll_clk->name); in _samsung_clk_register_pll()
1439 init.name = pll_clk->name; in _samsung_clk_register_pll()
1440 init.flags = pll_clk->flags; in _samsung_clk_register_pll()
1441 init.parent_names = &pll_clk->parent_name; in _samsung_clk_register_pll()
1444 if (pll_clk->rate_table) { in _samsung_clk_register_pll()
1446 for (len = 0; pll_clk->rate_table[len].rate != 0; ) in _samsung_clk_register_pll()
1450 pll->rate_table = kmemdup(pll_clk->rate_table, in _samsung_clk_register_pll()
1456 __func__, pll_clk->name); in _samsung_clk_register_pll()
1459 switch (pll_clk->type) { in _samsung_clk_register_pll()
1574 __func__, pll_clk->name); in _samsung_clk_register_pll()
1578 pll->type = pll_clk->type; in _samsung_clk_register_pll()
1579 pll->lock_reg = base + pll_clk->lock_offset; in _samsung_clk_register_pll()
1580 pll->con_reg = base + pll_clk->con_offset; in _samsung_clk_register_pll()
1585 __func__, pll_clk->name, ret); in _samsung_clk_register_pll()
1590 samsung_clk_add_lookup(ctx, &pll->hw, pll_clk->id); in _samsung_clk_register_pll()